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US5485585A Expired / Lapsed US ⏱️ 0.0 years remaining

Personal computer with alternate system controller and register for identifying active system controller

Assignee: International Business Machines Corp
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Filing: 1992-09-18
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Granted: 1996-01-16
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Expires: 2012-09-18
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Abstract

Abstract This invention relates to personal computers having the capability for the usual system controlling processor to be reset, initialized and then isolated if an alternate system controller is provided for the system. In accordance with this invention, a personal computer system has a high speed local processor data bus; an input/output data bus; a microprocessor coupled directly to the local processor bus; a connector coupled directly to the local processor bus for accommodating reception of an alternate system controller; and a bus interface controller coupled directly to the local processor bus and directly to the input/output data bus for providing communications between the local processor bus and the input/output data bus. Provision is made for setting a status bit to identify to software such as diagnostic software which microprocessor is functioning as the system controlling processor.

Inventors

  • 👤 Duy Q. Huynh
  • 👤 Kim V. Lam
  • 👤 Loc T. Tran

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-06 01:53
CPC Classifications
G; G06; G06F; G06F11/00; G06F11/07; G06F11/16; G06F11/20

Claims Analysis

Total Claims: 8
Claim 1
Independent Claim 175 words
A personal computer system comprising: a high speed local processor data bus; an input/output data bus; a microprocessor coupled directly to said local processor bus; a connector coupled directly to said local processor bus for accommodating reception of an alternate system controller; only one of (a) said microprocessor and (b) an alternate system controller accommodated in said connector functioning as an active system controlling processor over any defined interval of time; a register coupled to said local processor bus for receiving and retaining status information regarding which of (a) said microprocessor and (b) an alternate system controller accommodated in said connector is said active system controlling processor over any defined interval of time, said register being accessible to said active system controller; and a bus interface controller coupled directly to said local processor bus and directly to said input/output data bus for providing communications between said local processor bus and said input/output data bus, said bus interface controller providing for transferring system control between said microprocessor and an alternate system controller accommodated in said connector.
Claim 2
Dependent Claim 175 words
A personal computer system comprising: a high speed local processor data bus; an input/output data bus; a microprocessor coupled directly to said local processor bus; a connector coupled directly to said local processor bus for accommodating reception of an alternate system controller; only one of (a) said microprocessor and (b) an alternate system controller accommodated in said connector functioning as an active system controlling processor over any defined interval of time; a register coupled to said local processor bus for receiving and retaining status information regarding which of (a) said microprocessor and (b) an alternate system controller accommodated in said connector is said active system controlling processor over any defined interval of time, said register being accessible to said active system controller; and a bus interface controller coupled directly to said local processor bus and directly to said input/output data bus for providing communications between said local processor bus and said input/output data bus, said bus interface controller providing for transferring system control between said microprocessor and an alternate system controller accommodated in said connector.
Claim 3
Dependent Claim 56 words
A personal computer system according to claim 1 wherein said connector has a plurality of pins for connection with an alternate system controller accommodated therein and said register is operatively connected with one of said pins and responsive to the physical presence of an alternate system controller accommodated in said connector and connected with said pin.
Claim 4
Dependent Claim 46 words
A personal computer system according to claim 1 wherein said bus interface controller generates a sequence of signals indicative of the transfer of system control to an alternate system controller accommodated in said connector and further wherein said register is responsive to said sequence of signals.
Claim 5
Dependent Claim 219 words
A personal computer system comprising: a high speed data bus; an input/output data bus; a microprocessor coupled to said high speed data bus; volatile memory coupled to said high speed data bus for volatile storage of data; storage memory devices for nonvolatile storage of data; a storage controller coupled to said high speed data bus and to said storage memory devices for regulating communications with said storage memory devices; a connector coupled directly to said local processor bus for accommodating reception of an alternate system controller; only one of (a) said microprocessor and (b) an alternate system controller accommodated in said connector functioning as an active system controlling processor over any defined interval of time; a register coupled to said local processor bus for receiving and retaining status information regarding which of (a) said microprocessor and (b) an alternate system controller accommodated in said connector is said active system controlling processor over any defined interval of time, said register being accessible to said active system controller; and a bus interface controller coupled directly to said local processor bus and directly to said input/output data bus for providing communications between said local processor bus and said input/output data bus, said bus interface controller providing for transferring system, control between said microprocessor and an alternate system controller accommodated in said connector.
Claim 6
Dependent Claim 219 words
A personal computer system comprising: a high speed data bus; an input/output data bus; a microprocessor coupled to said high speed data bus; volatile memory coupled to said high speed data bus for volatile storage of data; storage memory devices for nonvolatile storage of data; a storage controller coupled to said high speed data bus and to said storage memory devices for regulating communications with said storage memory devices; a connector coupled directly to said local processor bus for accommodating reception of an alternate system controller; only one of (a) said microprocessor and (b) an alternate system controller accommodated in said connector functioning as an active system controlling processor over any defined interval of time; a register coupled to said local processor bus for receiving and retaining status information regarding which of (a) said microprocessor and (b) an alternate system controller accommodated in said connector is said active system controlling processor over any defined interval of time, said register being accessible to said active system controller; and a bus interface controller coupled directly to said local processor bus and directly to said input/output data bus for providing communications between said local processor bus and said input/output data bus, said bus interface controller providing for transferring system, control between said microprocessor and an alternate system controller accommodated in said connector.
Claim 7
Dependent Claim 254 words
A personal computer system comprising: a high speed data bus; a microprocessor coupled directly to said high speed data bus; volatile memory coupled directly to said high speed data bus for volatile storage of data; storage memory devices for nonvolatile storage of data; a storage controller coupled directly to said high speed data bus and to said storage memory devices for regulating communications with said storage memory devices; an input/output data bus; an input/output controller coupled directly to said input/output data bus; a digital signal processor coupled directly to said input/output data bus; a video signal processor coupled directly to said input/output data bus; a connector coupled directly to said local processor bus for accommodating reception of an alternate system controller; only one of (a) said microprocessor and (b) an alternate system controller accommodated in said connector functioning as an active system controlling processor over any defined interval of time; a register coupled to said local processor bus for receiving and retaining status information regarding which of (a) said microprocessor and (b) an alternate system controller accommodated in said connector is said active system controlling processor over any defined interval of time, said register being accessible to said active system controller; and a bus interface controller coupled directly to said local processor bus and directly to said input/output data bus for providing communications between said local processor bus and said input/output data bus, said bus interface controller providing for transferring system, control between said microprocessor and an alternate system controller accommodated in said connector.
Claim 8
Dependent Claim 254 words
A personal computer system comprising: a high speed data bus; a microprocessor coupled directly to said high speed data bus; volatile memory coupled directly to said high speed data bus for volatile storage of data; storage memory devices for nonvolatile storage of data; a storage controller coupled directly to said high speed data bus and to said storage memory devices for regulating communications with said storage memory devices; an input/output data bus; an input/output controller coupled directly to said input/output data bus; a digital signal processor coupled directly to said input/output data bus; a video signal processor coupled directly to said input/output data bus; a connector coupled directly to said local processor bus for accommodating reception of an alternate system controller; only one of (a) said microprocessor and (b) an alternate system controller accommodated in said connector functioning as an active system controlling processor over any defined interval of time; a register coupled to said local processor bus for receiving and retaining status information regarding which of (a) said microprocessor and (b) an alternate system controller accommodated in said connector is said active system controlling processor over any defined interval of time, said register being accessible to said active system controller; and a bus interface controller coupled directly to said local processor bus and directly to said input/output data bus for providing communications between said local processor bus and said input/output data bus, said bus interface controller providing for transferring system, control between said microprocessor and an alternate system controller accommodated in said connector.

References Cited (Backward Citations)

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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1999-01-15 1999-07-17 2000-01-16 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2003-01-15 2003-07-17 2004-01-16 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2007-01-15 2007-07-17 2008-01-16 $7700.00 Window Closed / Lapsed

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