Method and apparatus for providing backup process control

Claim 2

In a system having a plurality of data processors for controlling a resource, a method of controlling the resource comprising the steps of: a. communicating with the resource only from a first one of the data processors, the step of communicating including a step of transmitting data and receiving data through an active channel of a switch means, the switch means being coupled through a first communication path to the resource; b. periodically monitoring at the same time as the step of communicating with a second one of the data processors an activity of the first one of the data processors to determine if the first one of the data processors has stopped communicating with the resource, the step of monitoring occurring through a local area network second communication path coupled at least between the first one of the data processors and the second one of the data processors, the second one of the data processors being isolated from the resource; and c. if the step of monitoring indicates that the first one of the data processors has stopped communicating with the resource because of a detected control fault the method includes the further steps of i. independently having the second one of the data processors activate itself via a signal to the switch means such that the second one of the data processors is coupled to the active channel instead of the first one of the data processors; and ii. communicating with the resource only from the second one of the data processors, the step of communicating including a step of transmitting data and receiving data via the active channel of the switch means through the first communication path.

Claim 3

A method as set forth in claim 1 wherein the step of periodically monitoring includes a step of interrogating the first one of the data processors to determine a state of the resource and further includes a step of receiving a response from the first one of the data processors.

Claim 4

A method as set forth in claim 2 wherein the steps of periodically interrogating and receiving a response each include a step of communicating directly through the local area network second communication path.

Claim 5

A method as set forth in claim 2 wherein the step of receiving a response includes a step of storing in a memory means of the second one of the data processors the received response.

Claim 6

A method as set forth in claim 2 wherein the resource includes means for generating a digital signal having an output coupled to both the first one of the data processors and to the second one of the data processors and wherein the step of monitoring includes the additional steps of: periodically commanding the generating means to generate the digital signal, the step of periodically commanding including a step of transmitting a command to the generating means from the first one of the data processors through the first communication path; generating the digital signal; and reading the digital signal with the second one of the data processors to verify that the digital signal has been generated.

Claim 7

A method as set forth in claim 1 wherein the step of monitoring with a second one of the data processors includes an additional step of monitoring activity of the active channel to determine if the first one of the data processors has stopped communicating with the resource.

Claim 8

A method as set forth in claim 1 wherein the step of switching includes the steps of: signalling the data switch means from the second one of the data, processors by generating a pulse having a pulsewidth of predetermined duration to switch the second one of the data processors to the active channel of the switch means to receive data and transmit data, the data being received from the resource while isolating the first one of the processor units from the active channel of the switch means.

Claim 9

A method as set forth in claim 7 wherein the step of switching includes an initial step of verifying with the digital switch means that the generated pulse has a pulsewidth of predetermined duration.

Claim 10

Process control apparatus having at least two data processors for controlling at least one process controlling means, at any given time one of the data processors functioning in an active mode for controlling the process controlling means and the other one of the data processors functioning in a backup mode for assuming, if required, the function of the active data processor, the apparatus comprising: a. means for communicating via only a first communication path with the process controlling means, said communicating means comprising a first digital bus coupled from the process controlling means to a first port of a digital switching means, a second digital bus coupled between the active data processor and a second port of the digital switching means, and a third digital bus coupled between a third port of the digital switching means and the backup data processor, the digital switching means comprising means for coupling at any given time either the second one of the digital buses or the third one of the digital buses to the first digital bus; b. means for periodically monitoring with the backup data processor an activity of the active data processor at the same time that the active data processor communicates with the process controlling means to determine if the active data processor has failed, the monitoring means comprising a local area network second communication path directly coupled between the active data processor and the backup data processor, the backup data processor being isolated from the process controlling means; and c. the digital switch means further comprising means having an input coupled to the backup data processor and responsive to an electrical pulse having a pulsewidth of predetermined duration that is generated independently by the backup data processor in response to a monitored condition by the monitoring means of a control fault between the active data processor and the process controlling means for switching the first digital bus from the active data processor to the backup data processor such that the backup data processor can assume the function of the active data processor.

Claim 11

Process control apparatus having at least two data processors for controlling at least one process controlling means, at any given time one of the data processors functioning in an active mode for controlling the process controlling means and the other one of the data processors functioning in a backup mode for assuming, if required, the function of the active data processor, the apparatus comprising: a. means for communicating via only a first communication path with the process controlling means, said communicating means comprising a first digital bus coupled from the process controlling means to a first port of a digital switching means, a second digital bus coupled between the active data processor and a second port of the digital switching means, and a third digital bus coupled between a third port of the digital switching means and the backup data processor, the digital switching means comprising means for coupling at any given time either the second one of the digital buses or the third one of the digital buses to the first digital bus; b. means for periodically monitoring with the backup data processor an activity of the active data processor at the same time that the active data processor communicates with the process controlling means to determine if the active data processor has failed, the monitoring means comprising a local area network second communication path directly coupled between the active data processor and the backup data processor, the backup data processor being isolated from the process controlling means; and c. the digital switch means further comprising means having an input coupled to the backup data processor and responsive to an electrical pulse having a pulsewidth of predetermined duration that is generated independently by the backup data processor in response to a monitored condition by the monitoring means of a control fault between the active data processor and the process controlling means for switching the first digital bus from the active data processor to the backup data processor such that the backup data processor can assume the function of the active data processor.

Claim 12

Process control apparatus as set forth in claim 9 wherein the local area network second communication path includes name registry means and wherein an identity of the active data processor is stored within the name registry means.

Claim 13

Process control apparatus as set forth in claim 9 and further comprising watch dog timer means coupled to both the second digital bus and to the third digital bus for monitoring bus activity at least on the digital bus associated with the active data processor.

Claim 14

Process control apparatus as set forth in claim 11 wherein the watch dog timer means includes output means coupled to an input of the backup data processor for notifying the backup data processor of a cessation of bus activity on the digital bus associated with the active data processor.

Claim 15

Process control apparatus as set forth in claim 11 wherein the watch dog timer means includes output means coupled to an input of the switching means for initiating the switching of the first digital bus to the backup data processor upon a cessation of bus activity on the digital bus associated with the active data processor.

Claim 16

Process control apparatus as set forth in claim 9 and further comprising means for generating a digital signal, said digital signal generating means having an output coupled at least to the backup data processor and an input coupled to the active data processor through the first digital bus such that the active data processor is enabled to periodically command the digital signal generating means to generate a digital signal, the backup data processor including means for reading the digital signal to verify that the digital signal has been generated.

Claim 17

Digital switching apparatus comprising a first port for coupling to a first bus, a second port for coupling to a second bus, and a third port for coupling to a third bus, the digital switching apparatus further comprising means for coupling /at any given time either the second bus or the third bus to the first bus, the digital switching apparatus further comprising pulse detection means having a first input means and a second input means each for coupling to an electrical pulse, the pulse detection means comprising means for determining if a pulsewidth of a detected pulse is within a predetermined pulsewidth range and further comprising means for determining if a received pulse transitions from a first logic state to a second logic state and back to the first logic state, the pulse detection means having an output means coupled to the coupling means for causing the coupling means to couple the second bus to the first bus when a pulse generated by a first active data processor is detected on the first input means and for causing the coupling means to couple the third bus to the first bus when a pulse generated independently by a second backup data processor in response to a detected control fault in the first active data processor is detected on the second input means, the second backup data processor being isolated from process controlling means communicating with the first active data processor.

Claim 18

Digital switching apparatus comprising a first port for coupling to a first bus, a second port for coupling to a second bus, and a third port for coupling to a third bus, the digital switching apparatus further comprising means for coupling /at any given time either the second bus or the third bus to the first bus, the digital switching apparatus further comprising pulse detection means having a first input means and a second input means each for coupling to an electrical pulse, the pulse detection means comprising means for determining if a pulsewidth of a detected pulse is within a predetermined pulsewidth range and further comprising means for determining if a received pulse transitions from a first logic state to a second logic state and back to the first logic state, the pulse detection means having an output means coupled to the coupling means for causing the coupling means to couple the second bus to the first bus when a pulse generated by a first active data processor is detected on the first input means and for causing the coupling means to couple the third bus to the first bus when a pulse generated independently by a second backup data processor in response to a detected control fault in the first active data processor is detected on the second input means, the second backup data processor being isolated from process controlling means communicating with the first active data processor.

Claim 19

Digital switching apparatus as set forth in claim 15 wherein the first port, the second port and the third port are comprised of logic devices one selected from the group consisting of open collector outputs, high impedance outputs and combinations thereof.

Claim 20

Digital switching apparatus as set forth in claim 15 and further comprising means for monitoring activity of at least one signal line associated with the second bus and the third bus, the monitoring means further having an output for indicating an occurrence of a cessation of activity of the at least one signal line.

Claim 21

Digital switching apparatus as set forth in claim 17 wherein said monitoring means output is coupled to means for generating the detected pulse to cause said pulse to be generated.

Claim 22

Digital switching apparatus as set forth in claim 17 wherein said monitoring means output is coupled to the pulse detection means for causing the pulse detection means to generate an output indicating an occurrence of a cessation of activity of the at least one signal line.