Process for preparing a semiconductor device with a narrow-channel MOS transistor

Claim 2

A process for preparing a semiconductor device with a narrow-channel MOS transistor and a normal channel MOS transistor, said narrow-channel MOS transistor having a channel region narrower than a channel region of said normal-channel MOS transistor, comprising the steps of: forming an oxidation resistant masking film on a semiconductor region of the surface of a semiconductor substrate; forming a masking film for field-forming selectively on said oxidation resistant masking film; removing said oxidation resistant masking film selectively using said masking film for field-forming as a mask; forming selectively a masking film for ion implantation, said masking film for implantation being larger, at least in a region in which the narrow-channel MOS transistor is to be formed, than an overlap region between said masking film for field-forming and a portion of said semiconductor region and completely covering up said overlap region; implanting impurity ions having the same conduction-type with that of said semiconductor region into the region of the surface of the semiconductor substrate other than the regions covered by both said masking film for field-forming and said masking film for ion implantation by self-align method; removing said masking film for field-forming and said masking film for ion implantation; and forming field oxide layers selectively by heat-treating self-aligned with said oxidation resistant masking film to partition element forming regions.

Claim 3

A process for preparing a semiconductor device with a narrow-channel MOS transistor according to claim 1, wherein said one conduction- type is p-type.

Claim 4

A process for preparing a semiconductor device with a narrow-channel MOS transistor according to claim 1 or 2, wherein said oxidation resistant masking film is composed of silicon nitride film, and said masking film for field-forming and said masking film for ion implantation are resist films.

Claim 5

A process for preparing a semiconductor device with a narrow-channel MOS transistor and a normal channel MOS transistor, said narrow-channel MOS transistor having a channel region narrower than a channel region of said normal-channel MOS transistor, comprising the steps of: preparing one conduction-type semiconductor regions and the other conduction-type semiconductor regions on the surface of a semiconductor substrate; growing an oxidation resistant masking film on the entire surface of said semiconductor substrate; forming masking film for field-forming selectively on said oxidation resistant masking film; removing said oxidation resistant masking film selectively from the region except the area in which elements are to be formed in said one conduction-type semiconductor region and the other conduction-type semiconductor region, using said masking film for field-forming as a mask; forming masking film for ion implantation on a region, larger than and completely covering up, an overlap between said masking film for field-forming in the region in which said narrow-channel MOS transistor is to be formed and the designed gate electrode forming region of said narrow-channel MOS transistor as well as a region larger than said masking film for field-forming and oxidation resistant masking film on said the other conduction-type semiconductor region; implanting impurity ions having the same conduction-type with that of said one conduction-type semiconductor region into the region of the surface of the semiconductor substrate other than the regions covered by both said masking film for field-forming and said masking film for ion implantation by self-align method; removing said masking film for field-forming and said masking film for ion implantation; and forming field oxide layers selectively by heat-treating self-aligned with said oxidation resistant masking film to partition element forming regions.

Claim 6

A process for preparing a semiconductor device with a narrow-channel MOS transistor and a normal channel MOS transistor, said narrow-channel MOS transistor having a channel region narrower than a channel region of said normal-channel MOS transistor, comprising the steps of: preparing one conduction-type semiconductor regions and the other conduction-type semiconductor regions on the surface of a semiconductor substrate; growing an oxidation resistant masking film on the entire surface of said semiconductor substrate; forming masking film for field-forming selectively on said oxidation resistant masking film; removing said oxidation resistant masking film selectively from the region except the area in which elements are to be formed in said one conduction-type semiconductor region and the other conduction-type semiconductor region, using said masking film for field-forming as a mask; forming masking film for ion implantation on a region, larger than and completely covering up, an overlap between said masking film for field-forming in the region in which said narrow-channel MOS transistor is to be formed and the designed gate electrode forming region of said narrow-channel MOS transistor as well as a region larger than said masking film for field-forming and oxidation resistant masking film on said the other conduction-type semiconductor region; implanting impurity ions having the same conduction-type with that of said one conduction-type semiconductor region into the region of the surface of the semiconductor substrate other than the regions covered by both said masking film for field-forming and said masking film for ion implantation by self-align method; removing said masking film for field-forming and said masking film for ion implantation; and forming field oxide layers selectively by heat-treating self-aligned with said oxidation resistant masking film to partition element forming regions.

Claim 7

A process for preparing a semiconductor device with a narrow-channel MOS transistor and a normal channel MOS transistor, said narrow-channel MOS transistor having a channel region narrower that a channel region of said normal-channel MOS transistor, comprising the steps of: preparing one conduction-type semiconductor region and the other conduction-type semiconductor regions on the surface of a semiconductor substrate; growing an oxidation resistant masking film on the entire surface of said semiconductor substrate; forming masking film for field-forming selectively on said oxidation resistant masking film; removing said oxidation resistant masking film selectively from the region except the area in which elements are to be formed in said one conduction-type semiconductor region and the other conduction-type semiconductor region, using said masking film for field-forming as a mask; forming masking film for ion implantation on a region larger than, and completely covering up the masking film for field-forming in a region in which said narrow-channel MOS transistor is to be formed as well as a region larger than and completely covering up the masking film for field-forming and the oxidation resistant masking film on said the other conduction-type semiconductor region; implanting impurity ions having the same conduction-type with said one conduction-type semiconductor into the region of the surface of the semiconductor substrate other than the regions covered by both said masking film for field-forming and said masking film for ion implantation by self-align method; removing said masking film for field-forming and said masking film for ion implantation; and forming field oxide layers selectively by heat-treating self-aligned with said oxidation resistant masking film to partition element forming regions.

Claim 8

A process for preparing a semiconductor device with a narrow-channel MOS transistor and a normal channel MOS transistor, said narrow-channel MOS transistor having a channel region narrower that a channel region of said normal-channel MOS transistor, comprising the steps of: preparing one conduction-type semiconductor region and the other conduction-type semiconductor regions on the surface of a semiconductor substrate; growing an oxidation resistant masking film on the entire surface of said semiconductor substrate; forming masking film for field-forming selectively on said oxidation resistant masking film; removing said oxidation resistant masking film selectively from the region except the area in which elements are to be formed in said one conduction-type semiconductor region and the other conduction-type semiconductor region, using said masking film for field-forming as a mask; forming masking film for ion implantation on a region larger than, and completely covering up the masking film for field-forming in a region in which said narrow-channel MOS transistor is to be formed as well as a region larger than and completely covering up the masking film for field-forming and the oxidation resistant masking film on said the other conduction-type semiconductor region; implanting impurity ions having the same conduction-type with said one conduction-type semiconductor into the region of the surface of the semiconductor substrate other than the regions covered by both said masking film for field-forming and said masking film for ion implantation by self-align method; removing said masking film for field-forming and said masking film for ion implantation; and forming field oxide layers selectively by heat-treating self-aligned with said oxidation resistant masking film to partition element forming regions.