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Method for making a semiconductor device having a silicon-on-insulator structure

Assignee: Samsung Electronics Co Ltd
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Filing: 1994-02-16
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Granted: 1996-01-09
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Expires: 2014-02-16
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Abstract

Abstract A method for making a semiconductor device having a silicon-on-insulator structure comprises the steps of: forming a pad oxide on a wafer which has a lower silicon substrate, a buried oxide layer and an upper silicon layer, forming an oxynitride region on a predetermined portion of the buried oxide layer; forming an active silicon layer to intersect the oxynitride region, and forming a cavity by wet-etching the exposed oxynitride region; forming a gate insulating layer on the surface of the exposed active silicon layer; forming a polysilicon to fill the cavity surrounding said active silicon layer and removing a predetermined portion of the doped polysilicon to form a gate electrode; and forming source and drain regions on the active silicon layer separated by the gate electrode.

Inventors

  • 👤 Taepok Rhee

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-30 03:26
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/60; H10D30/67; H10D30/6757; H10D30/01; H10D30/021; H10D30/031; H10D30/0321; H10D30/0323; H10D30/6729; H10D30/673; H10D30/6735; H10P; H10P14/00; H10P14/40; H10P14/416; H10P90/00; H10P90/19; H10P90/1904; H10P90/1906

Claims Analysis

Total Claims: 5
Claim 1
Independent Claim 121 words
A method for making a semiconductor device having a silicon-on-insulator, gate-all-around structure comprising the steps of: forming a pad oxide on a wafer which includes a lower silicon substrate, a buried insulator layer, and an upper silicon layer; forming an oxynitride region on a portion of said buried insulator layer; forming an active silicon layer to intersect said oxynitride region; forming a cavity by wet-etching said exposed oxynitride region; forming a gate insulating layer on the surface of the exposed active silicon layer; depositing polysilicon to fill said cavity surrounding said active silicon layer; removing a portion of said polysilicon to form a gate electrode; and forming source and drain regions on said active silicon layer separated by said gate electrode.
Claim 2
Independent Claim 121 words
A method for making a semiconductor device having a silicon-on-insulator, gate-all-around structure comprising the steps of: forming a pad oxide on a wafer which includes a lower silicon substrate, a buried insulator layer, and an upper silicon layer; forming an oxynitride region on a portion of said buried insulator layer; forming an active silicon layer to intersect said oxynitride region; forming a cavity by wet-etching said exposed oxynitride region; forming a gate insulating layer on the surface of the exposed active silicon layer; depositing polysilicon to fill said cavity surrounding said active silicon layer; removing a portion of said polysilicon to form a gate electrode; and forming source and drain regions on said active silicon layer separated by said gate electrode.
Claim 3
Dependent Claim 15 words
The method according to claim 1, wherein said oxynitride region is formed by nitrogen ion-implantation.
Claim 4
Dependent Claim 15 words
The method of claim 1, wherein said buried insulator layer is a buried oxide layer.
Claim 5
Dependent Claim 15 words
The method of claim 1, wherein said buried insulator layer is a buried nitride layer.

References Cited (Backward Citations)

US4619034A Cited
US5120666A Cited
US5188973A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1999-01-08 1999-07-10 2000-01-09 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2003-01-08 2003-07-10 2004-01-09 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2007-01-08 2007-07-10 2008-01-09 $7700.00 Window Closed / Lapsed

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