Control unit modifying micro instructions for one cycle execution

Claim 2

A control device which executes steps of operation clock-period by clock-period, comprising: first means for decoding a macro instruction into first address information and first control information during a first clock period; second means, connected to the first means to receive the first address information therefrom, for storing a plurality of micro instructions and for selecting and outputting a first one of the micro instructions in response to the first address information during a second clock period following the first clock period; third means, connected to the first means to receive the first control information therefrom, for generating a first control signal in response to the first control information during the second clock period; fourth means, receiving the macro instruction and being connected to the third means to receive the first control signal therefrom, for generating first modifying information from the macro instruction in response to the first control signal during the second clock period; and fifth means, connected to the second means and the fourth means to receive said first one of the micro instructions and the first modifying information therefrom, for modifying at least part of said first one of the micro instructions with the first modifying information during the second clock period; said second means being operative for selecting and outputting a second one of the micro instructions in response to at least part of said first one of the micro instructions during a third clock period following the second clock period; said third means being connected to the second means to receive at least part of said first one of the micro instructions therefrom and being operative for generating a second control signal in response to at least part of said first one of the micro instructions during the third clock period; said fourth means receiving the second control signal from the third means and being operative for generating second modifying information in response to the second control signal during the third clock period; said fifth means receiving said second one of the micro instructions from the second means and the second modifying information from the fourth means and being operative for modifying at least part of said second one of the micro instructions with the second modifying information during the third clock period.

Claim 3

A control device which executes steps of operation clock-period by clock-period, comprising: a decoder for decoding a macro instruction into first address information and first control information; a memory, connected to the decoder to receive the first address information therefrom, for storing a plurality of micro instructions and for selecting and outputting a first one of the micro instructions in response to the first address information during a second clock period following the first clock period; a controller, connected to the decoder to receive the first control information therefrom, for generating a first control signal in response to the first control information during the second clock period; a modifying information generator, receiving the macro instruction and being connected to the controller to receive the first control signal therefrom, for generating first modifying information from the macro instruction in response to the first control signal during the second clock period; and a modifying unit, connected to the memory and the modifying information generator to receive said first one of the micro instructions and the first modifying information therefrom, for modifying at least part of said first one of the micro instructions with the first modifying information during the second clock period; said memory being operative for selecting and outputting a second one of the micro instructions in response to at least part of said first one of the micro instructions during a third clock period following the second clock period; said controller being connected to the memory to receive at least part of said first one of the micro instructions therefrom and being operative for generating a second control signal in response to at least part of said first one of the micro instructions during the third clock period; said modifying information generator receiving the second control signal from the controller and being operative for generating second modifying information in response to the second modifying information in response to the second control signal during the third clock period; said modifying unit receiving said second one of the micro instructions and the second modifying information from the memory and the modifying information generator and being operative for modifying at least part of said second one of the micro instructions with the second modifying information during the third clock period.

Claim 4

A control device which executes steps of operation clock-period by clock-period, comprising: a decoder for decoding a macro instruction into first address information and first control information; a memory, connected to the decoder to receive the first address information therefrom, for storing a plurality of micro instructions and for selecting and outputting a first one of the micro instructions in response to the first address information during a second clock period following the first clock period; a controller, connected to the decoder to receive the first control information therefrom, for generating a first control signal in response to the first control information during the second clock period; a modifying information generator, receiving the macro instruction and being connected to the controller to receive the first control signal therefrom, for generating first modifying information from the macro instruction in response to the first control signal during the second clock period; and a modifying unit, connected to the memory and the modifying information generator to receive said first one of the micro instructions and the first modifying information therefrom, for modifying at least part of said first one of the micro instructions with the first modifying information during the second clock period; said memory being operative for selecting and outputting a second one of the micro instructions in response to at least part of said first one of the micro instructions during a third clock period following the second clock period; said controller being connected to the memory to receive at least part of said first one of the micro instructions therefrom and being operative for generating a second control signal in response to at least part of said first one of the micro instructions during the third clock period; said modifying information generator receiving the second control signal from the controller and being operative for generating second modifying information in response to the second modifying information in response to the second control signal during the third clock period; said modifying unit receiving said second one of the micro instructions and the second modifying information from the memory and the modifying information generator and being operative for modifying at least part of said second one of the micro instructions with the second modifying information during the third clock period.

Claim 5

The control device of claim 2 wherein the modifying information generator comprises a programmable logic array.

Claim 6

The control device of claim 2 further comprising an address generator feeding an address to the memory, the memory outputting one of the micro instructions to the modifying unit in accordance with the address, the modifying information generator outputting branch information to the address generator, the address generator determining the address on the basis of the branch information.

Claim 7

The control device of claim 2 further comprising an input register, connected to the modifying information generator, for storing the macro instruction and outputting the macro instruction to the modifying information generator.

Claim 8

The control device of claim 2 further comprising an input register storing input data inputted into the modifying information generator, the modifying information generator generating the first modifying information on the basis of the input data stored in the input register.

Claim 9

The control device of claim 6 further comprising a bit modifying unit connected to the input register and modifying a portion of the input data which is contained in a predetermined bit of the input register.

Claim 10

The control device of claim 6 further comprising a stack unit connected to the input register, the stack unit storing output data from the input register and returning the output data back to the input register.