EP0184158A2
Expired / Lapsed
EP
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Control unit for a microprogrammable processor
Assignee: Honeywell Inc
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Filing: 1985-11-29
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Granted: —
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Expires: 2005-11-29
Abstract
Abstract A controller (20) of a microprocessor includes a control store (201, 203) for storing microinstructions. A programmable logic array (PLA 204), enabled when a predetermined instruction type is to be executed, translates the operand field of the microinstruction into information bits which are used to modify the microinstruction as it is being fetched from the control store. The bits of the microinstruction which are changeable are coupled from the control store (201, 203) to a first input of a multiplexer (202). The output of the PLA (204) is coupled to a second input of the multiplexer. A select signal for the multiplexer is generated when the predetermined instruction type is to be executed, thereby effecting a modification of the fetched microinstruction, and yielding a modification to the basic operation of the microinstruction.
Inventors
- 👤 Burke B. Baumann
- 👤 Troy Kimberley Wilson
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-28 22:47
CPC Classifications
G; G06; G06F; G06F9/00; G06F9/06; G06F9/22; G06F9/223; G06F9/226; G06F9/30; G06F9/30145; G06F9/30181; G06F9/30185
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
255 words
A control unit (20) for a microprogrammable processor (10) which includes an arithmetic and logic unit (ALU110) and associated registers (101,102,104,105,...) for executing each instruction of a predefined instruction set, each instruction having an operand field and an operation code field, characterized in that said controller (20) comprises: a) control store means (201,203) for storing a plurality of microinstructions; b) translation means (204), having input terminals adapted to receive the operand field of the instruction currently being executed, for converting the information expressed by the format of the operand field of the instruction into information compatible with the format of the microinstruction word, thereby outputting converted operand data utilized to modify the microinstruction word as it is being fetched from the control store means (201,203); c) switching means (202), having a first set of input terminals operatively connected to said control store means (201,203) to receive preselected portions of a fetched microinstruction., and further having a second set of input terminals operatively connected to said translation means to receive said converted operand data, for selecting between (i) the preselected portion of a fetched microinstruction word and (ii) the converted operand data, in response to a select signal, thereby outputting selected data; and d) register means (205) operatively connected to said switching means (202) to receive the selected data, and further operatively connected to said control store means (201,203) to receive that portion of the fetched microinstruction word which is not subject to being selected by said switching means, for holding the microinstruction for current execution.
Claim 2
Dependent Claim
52 words
A uP-controller, according to Claim 1, further characterized by decoder means (206), operatively connected to said register means (205), for decoding preselected bits of said register means to generate a second set of control signals, including the select signal, thereby providing partial control of said ALU (110) and said associated registers (101,102,104,105).
Claim 3
Dependent Claim
81 words
A uP-controller, according to Claim 2, characterized by logic means (207,208) operatively connected to said translation means (204), and further having a first input terminal adapted to receive a first condition signal indicating a condition of a preselected bit and having a second input terminal adapted to receive a second condition signal indicating a condition of a test output of said ALU, for providing a test signal indicating the results of a tested condition resulting from the execution of said microinstruction.
Claim 4
Dependent Claim
51 words
µP-controller, according to Claim 1, characterized in that said control store means (201,203) comprises: a) a first control store (201) for storing a plurality of microinstructions subject to decoding; and b) a second control store (203) operatively connected to said ALU (110), for storing constant digital values corrsponding to said microinstructions.
Claim 5
Dependent Claim
62 words
A µP-controller according to Claim 2 or one of the subsequent claims, whereat the register means (205) output a first set of control signals and the decoder means (206) generate the second set of control signals, including the select signal, characterized in that said first and second set of control signals provide control of said ALU (110) and said associated registers (101,102,104,105).
Claim 6
Dependent Claim
74 words
A µP-controller according to one of the preceding claims, characterized by holding means (205,206), operatively connected to said switching means (202) to receive the selected data, and further operatively connected to said control store means (201,203) to receive that portion of the fetched microinstruction word which is not subject to being selected by said switching means, for providing control signals to said ALU (110) and associated registers (101,102,104,105) for the microinstruction currently being executed.
Claim 7
Dependent Claim
19 words
A µP-controller according to one of the prededing claims, characterized in that the switching means (202) includes a multiplexer.
References Cited (Backward Citations)
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