Semiconductor circuit device capable of reducing influence of a parasitic capacitor

Claim 1

A semiconductor circuit device comprising a semiconductor substrate and a differential amplifier circuit which is formed on said semiconductor substrate and which comprises first and second input terminals and an output terminal, said differential amplifier circuit being supplied with an input signal through a first resistor connected to said first input terminal and producing an output signal through said output terminal, said differential amplifier circuit being supplied with said output signal through a second resistor connected between said second input terminal and said output terminal, said semiconductor circuit device having a first parasitic capacitor formed between said semiconductor substrate and said first resistor and a second parasitic capacitor formed between said semiconductor substrate and said second resistor, wherein: each of said first and said second resistors is implemented by a wiring pattern and is formed in a wiring layer formed over said semiconductor substrate so that said first and said second parasitic capacitors are equivalent to each other.