Process for fabricating integrated circuit containing shallow junction using dopant source containing organic polymer or ammonium silicate

Claim 1

A process for fabricating a transistor with a junctions depth of about 0.06 microns or less comprising: depositing a dopant source comprising a dopant and a material selected from the group consisting of organic polymers and ammonium silicate onto at least a portion of a substrate; wherein the concentration of dopant in the dopant source is about 1 mole percent to 10 mole percent heating the substrate to a temperature of about 900° C. to about 1100° C. in an atmosphere that is essentially oxygen free for a period not to exceed about 1 minute, thereby driving the dopant from the dopant source into the substrate and providing shallow junctions for source and drain areas with a peak dopant concentration in excess of 1×10 19 atoms/cm 3 and a depth that does not exceed about 0.06 microns into the substrate; and removing the dopant source from the substrate using an etchant comprising an oxidizing agent and a strong base that is essentially free of HF.