Image processing apparatus for binarizing multi-value image data

Claim 2

An image processing apparatus for converting multi-value pixel data representing a gradation, outputted from a host computer, into binarized pixel data, said apparatus comprising: means for inputting from the host computer first pattern information for a binarization process; first storage means for storing said first pattern information inputted by said inputting means; and binarizing means for binarizing inputted multi-value pixel data using said first pattern information stored in said first storage means, and for generating the binarized pixel data.

Claim 3

An apparatus according to claim 1, further comprising second storage means for storing in advance second pattern information, wherein said apparatus has a first mode during which said inputted multi-value pixel data is binarized using said first pattern information, and a second mode during which said inputted multi-value pixel data is binarized using said second pattern information.

Claim 4

An apparatus according to claim 2, wherein said second storage means is a ROM.

Claim 5

An apparatus according to claim 2, wherein said first pattern information and said second pattern information include patterns in correspondence with gradations represented by said multi-value pixel data.

Claim 6

An apparatus according to claim 4, wherein said binarizing means reads out a pattern corresponding to a gradation represented by said inputted multi-value pixel data from one of said first storage means and said second storage means.

Claim 7

An apparatus according to claim 2, further comprising selecting means for selecting one of said first mode and said second mode.

Claim 8

An apparatus according to claim 6, wherein said selecting means is manually selectable between one of said first mode and said second mode.

Claim 9

An apparatus according to claim 6, wherein said selecting means selects one of said first mode and said second mode in accordance with a command sent from said host computer.

Claim 10

An apparatus according to claim 2, wherein in a test printing, said apparatus prints a same multi-value pixel data on a same print sheet using both of said first mode and said second mode.

Claim 11

An apparatus according to claim 2, wherein said first storage means stores said first pattern information having a pattern size different from that of said second pattern information stored in said second storage means.

Claim 12

An apparatus according to claim 2, further comprising display means for displaying a current mode.

Claim 13

An apparatus according to claim 2, wherein said apparatus prints an image on a predetermined area of a print sheet in a particular mode.

Claim 14

An apparatus according to claim 12, wherein said predetermined area or said particular mode is designated by an operator.

Claim 15

An apparatus according to claim 12, further comprising means for detecting, as said predetermined area, an edge portion of an image to be printed.

Claim 16

An apparatus according to claim 1, wherein said apparatus comprises a color image processing apparatus, and said first storage means stores said first pattern information for each color component.

Claim 17

An apparatus according to claim 15, wherein said apparatus stores said first pattern information in which each color has a different pattern size.

Claim 18

An image processing apparatus for outputting binarized pixel data converted from multi-value pixel data supplied from an external apparatus, said apparatus comprising: input means for inputting from said external apparatus multi-value pixel data representing a first gradation value and first binarization patterns, said first binarization patterns corresponding to a second gradation value; a register for registering the first binarization patterns inputted by the input means; and a ROM, for storing in advance, a second binarization pattern corresponding to each of the first gradation value and the second gradation value, wherein, after the first binarization patterns are registered in said register, said apparatus is operable in a first mode during which said apparatus outputs the binarized pixel data by using said first binarization patterns and a second mode during which said apparatus outputs the binarized pixel data by using said second binarization pattern.

Claim 19

An image processing apparatus for outputting binarized pixel data converted from multi-value pixel data supplied from an external apparatus, said apparatus comprising: input means for inputting from said external apparatus multi-value pixel data representing a first gradation value and first binarization patterns, said first binarization patterns corresponding to a second gradation value; a register for registering the first binarization patterns inputted by the input means; and a ROM, for storing in advance, a second binarization pattern corresponding to each of the first gradation value and the second gradation value, wherein, after the first binarization patterns are registered in said register, said apparatus is operable in a first mode during which said apparatus outputs the binarized pixel data by using said first binarization patterns and a second mode during which said apparatus outputs the binarized pixel data by using said second binarization pattern.

Claim 20

An apparatus according to claim 17, wherein said apparatus comprises a color printer, and wherein said register stores said first binarization patterns in which each color has different binarization patterns.

Claim 21

An apparatus according to claim 18, wherein said register stores said first binarization patterns having pattern sizes different for each color.

Claim 22

An apparatus according to claim 6, wherein said selecting means selects said second mode when the first pattern information is stored in the first storage means.

Claim 23

A printing apparatus according to claim 17, further comprising means for selecting either one of the first mode and the second mode, wherein said selection means selects said second mode when the first binarization patterns are stored in said register.