US5467130A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Ground driven delay line correlator
Assignee: Eastman Kodak Co
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Filing: 1994-10-28
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Granted: 1995-11-14
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Expires: 2014-10-28
Abstract
Abstract A ground driven delay line correlator circuit for removing noise from an image signal produced by a solid state imaging device such as a CCD sensor. The delay line is made up of a shielded inductor having a certain impedance and delay period.
Inventors
- 👤 Kim M. Darden
- 👤 Hokon O. Flogstad
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-08 23:52
CPC Classifications
H; H04; H04N; H04N25/00; H04N25/60; H04N25/618; H04N25/616
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
142 words
A correlator circuit for removing noise from a signal, comprising: a shielded delay line having a characteristic impedance Z O and a delay period τ; said shielded delay line having an inductor with first and second terminals and a shield terminal which is connected to electrical ground; an impedance connected between said second terminal and electrical ground, said impedance having an impedance value Z O ; and a signal source for providing to said shield terminal of said shielded delay line a signal having a sequence of a first interval with a first signal value and a second interval with a second signal value; wherein the signal output from said first terminal of said delay line is free from noise and has a signal value which is a function of the difference between said first signal value and said second signal value.
Claim 2
Dependent Claim
142 words
A correlator circuit for removing noise from a signal, comprising: a shielded delay line having a characteristic impedance Z O and a delay period τ; said shielded delay line having an inductor with first and second terminals and a shield terminal which is connected to electrical ground; an impedance connected between said second terminal and electrical ground, said impedance having an impedance value Z O ; and a signal source for providing to said shield terminal of said shielded delay line a signal having a sequence of a first interval with a first signal value and a second interval with a second signal value; wherein the signal output from said first terminal of said delay line is free from noise and has a signal value which is a function of the difference between said first signal value and said second signal value.
Claim 3
Dependent Claim
38 words
The correlator circuit of claim 1 wherein the signal provided by said signal source is represented by E in (t) and the signal output from said delay line is represented by E out (t)=E in (t)-E in (t-τ).
Claim 4
Dependent Claim
20 words
The correlator circuit of claim 1 including a low pass filter for removing high frequency noise from said output signal.
Claim 5
Dependent Claim
19 words
The correlator circuit of claim 1 including a digital-to-analog circuit for converting said output signal into a digital signal.
Claim 6
Dependent Claim
146 words
A correlator circuit for removing noise from an image signal, comprising: a shielded delay line having a characteristic impedance Z O and a delay period τ; said shielded delay line having an inductor with first and second terminals and a shield terminal which is connected to electrical ground; an impedance connected between said second terminal and electrical ground, said impedance having an impedance value Z O ; and an image signal source for providing to said shield terminal of said shielded delay line an image signal having a sequence of a first interval with a reset signal value and a second interval with an image signal value; wherein the image signal output from said first terminal of said delay line is free from noise and has a signal value which is a function of the difference between said reset signal value and said image signal value.
Claim 7
Dependent Claim
146 words
A correlator circuit for removing noise from an image signal, comprising: a shielded delay line having a characteristic impedance Z O and a delay period τ; said shielded delay line having an inductor with first and second terminals and a shield terminal which is connected to electrical ground; an impedance connected between said second terminal and electrical ground, said impedance having an impedance value Z O ; and an image signal source for providing to said shield terminal of said shielded delay line an image signal having a sequence of a first interval with a reset signal value and a second interval with an image signal value; wherein the image signal output from said first terminal of said delay line is free from noise and has a signal value which is a function of the difference between said reset signal value and said image signal value.
Claim 8
Dependent Claim
41 words
The correlator circuit of claim 5 wherein the image signal provided by said image signal source is represented by E in (t) and the image signal output from said delay line is represented by E out (t)=E in (t)-E in (t-τ).
Claim 9
Dependent Claim
21 words
The correlator circuit of claim 5 including a low pass filter for removing high frequency noise from said output image signal.
Claim 10
Dependent Claim
21 words
The correlator circuit of claim 5 including a digital-to-analog circuit for converting said output image signal into a digital image signal.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1998-11-13 | 1999-05-15 | 1999-11-14 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2002-11-13 | 2003-05-15 | 2003-11-14 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2006-11-13 | 2007-05-15 | 2007-11-14 | $7700.00 | Window Closed / Lapsed |