US5460992A
Expired / Lapsed
US
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Fabricating non-volatile memory device having a multi-layered gate electrode
Assignee: NEC Electronics Corp
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Filing: 1995-05-11
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Granted: 1995-10-24
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Expires: 2015-05-11
Abstract
Abstract A non-volatile memory device with a multi-layered gate electrode structure is fabricated by forming a floating gate electrode and a thermally oxidized silicon film on surfaces inclusive of a surface of the multi-layered gate electrode structure having a control gate electrode, and then forming, by a thermal nitrifying treatment, a thermally nitrified oxidized silicon film at an interface between the thermally oxidized silicon film and the multi-layered gate electrode structure. Diffusion of impurity into a multi-layered gate electrode structure of the memory is prevented and also leakage current due to mismatching at the film interface is reduced.
Inventors
- 👤 Eiji Hasegawa
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 10:30
CPC Classifications
H; H10; H10B; H10B10/00; H10D; H10D30/00; H10D30/01; H10D30/021; H10D30/0411; Y; Y10; Y10S; Y10S148/00; Y10S148/114
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
133 words
A method for fabricating a non-volatile memory device comprising the steps of: forming, on a semiconductor substrate, a multi-layered gate electrode structure by sequentially depositing a first gate insulating film, a floating gate electrode constituted by a polycrystalline silicon film, a second insulating film, and a control electrode constituted by a polycrystalline silicon film; forming a first oxidized silicon film on surfaces inclusive of a surface of said multi-layered gate electrode structure; forming, by a thermally nitrifying treatment, a thermally nitrified oxidized silicon film at an interface between said first oxidized silicon film and said multi-layered gate electrode structure and semiconductor substrate; and forming, by a thermally oxidizing treatment, a second oxidized silicon film at an interface between said thermally nitrified oxidized silicon film and said multi-layered gate electrode structure and semiconductor substrate.
Claim 2
Independent Claim
133 words
A method for fabricating a non-volatile memory device comprising the steps of: forming, on a semiconductor substrate, a multi-layered gate electrode structure by sequentially depositing a first gate insulating film, a floating gate electrode constituted by a polycrystalline silicon film, a second insulating film, and a control electrode constituted by a polycrystalline silicon film; forming a first oxidized silicon film on surfaces inclusive of a surface of said multi-layered gate electrode structure; forming, by a thermally nitrifying treatment, a thermally nitrified oxidized silicon film at an interface between said first oxidized silicon film and said multi-layered gate electrode structure and semiconductor substrate; and forming, by a thermally oxidizing treatment, a second oxidized silicon film at an interface between said thermally nitrified oxidized silicon film and said multi-layered gate electrode structure and semiconductor substrate.
Claim 3
Independent Claim
170 words
A method for fabricating a non-volatile memory device comprising the steps of: forming a floating gate electrode by depositing a polycrystalline silicon film on a first gate insulating film constituted by an oxidized silicon film formed on a semiconductor substrate and patterning the polycrystalline silicon film thus formed; forming, by a thermally nitrifying treatment, a thermally nitrified silicon film on a surface of said floating gate electrode and simultaneously forming a thermally nitrified oxidized silicon film at an interface between said oxidized silicon film on said semiconductor substrate and said semiconductor substrate; forming, by a thermally oxidizing treatment, a thermally oxidized silicon film at an interface between said thermally nitrified silicon film and said floating gate electrode and also at an interface between said thermally nitrified oxidized silicon film and said semiconductor substrate; and forming a control gate electrode aligned to said floating gate electrode by depositing a polycrystalline silicon film on surfaces inclusive of a surface of said thermally nitrified silicon film and patterning said polycrystalline silicon film deposited.
Claim 4
Independent Claim
170 words
A method for fabricating a non-volatile memory device comprising the steps of: forming a floating gate electrode by depositing a polycrystalline silicon film on a first gate insulating film constituted by an oxidized silicon film formed on a semiconductor substrate and patterning the polycrystalline silicon film thus formed; forming, by a thermally nitrifying treatment, a thermally nitrified silicon film on a surface of said floating gate electrode and simultaneously forming a thermally nitrified oxidized silicon film at an interface between said oxidized silicon film on said semiconductor substrate and said semiconductor substrate; forming, by a thermally oxidizing treatment, a thermally oxidized silicon film at an interface between said thermally nitrified silicon film and said floating gate electrode and also at an interface between said thermally nitrified oxidized silicon film and said semiconductor substrate; and forming a control gate electrode aligned to said floating gate electrode by depositing a polycrystalline silicon film on surfaces inclusive of a surface of said thermally nitrified silicon film and patterning said polycrystalline silicon film deposited.
Claim 5
Dependent Claim
52 words
The method for fabricating a non-volatile memory device according to claim 1, in which said semiconductor substrate is of a p-type and in which an n-type impurity is ion-implanted into a surface portion of said semiconductor substrate using said multi-layered gate electrode structure as a mask thereby forming a source/drain diffusion layer.
Claim 6
Dependent Claim
51 words
The method for fabricating a non-volatile memory device according to claim 2, in which said semiconductor substrate is of a p-type and in which an n-type impurity is ion-implanted into a surface portion of said semiconductor substrate using said floating gate electrode as a mask thereby forming a source/drain diffusion layer.
References Cited (Backward Citations)
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