Abstract A transistor gate array includes an active transistor region (50a-50n) of transistor gates all oriented in a single direction. Surrounding the active transistor region on all four sides are input/output regions (52a-52d) each containing a row of input/output transistors. All of the I/O devices on all sides of the array are oriented in the same common direction, which is the same direction as the orientation of the active transistor in the active region. This arrangement allows the use of the benefits of high angle ion implantation with fewer ion implant steps. Where some of the transistors are oriented at right angles to others, as in the prior art, four separate directions of high angle ion implantation are required to avoid degradation of electrical properties. With all transistors, including those of the gate array and those of the input/output devices, all oriented in the same direction, only two directions of high angle ion implantation are required.
A method of forming an array of semiconductor gates comprising the steps of: providing a substrate having at least one gate region bordered by an I/O region, forming an array of active transistors in said gate region each having a source and drain defining an active transistor orientation, forming a plurality of I/O transistors in said I/O region each having a source and drain defining an I/O transistor orientation, both said steps of forming comprising forming all of said active transistor and I/O transistor orientations the same as each other, with orientations of all of said active transistors the same as all of said I/O transistor orientations, and all of said orientations extending parallel to an axis, directing a first ion implantation beam at an angle to and toward said substrate in a first direction parallel to said axis, and directing a second ion implantation beam at an angle to and toward said substrate in a second direction opposite said first direction and parallel to said axis, whereby ion implantation is completed with implantation beams in only two directions.
Claim 2
Independent Claim
179 words
A method of forming an array of semiconductor gates comprising the steps of: providing a substrate having at least one gate region bordered by an I/O region, forming an array of active transistors in said gate region each having a source and drain defining an active transistor orientation, forming a plurality of I/O transistors in said I/O region each having a source and drain defining an I/O transistor orientation, both said steps of forming comprising forming all of said active transistor and I/O transistor orientations the same as each other, with orientations of all of said active transistors the same as all of said I/O transistor orientations, and all of said orientations extending parallel to an axis, directing a first ion implantation beam at an angle to and toward said substrate in a first direction parallel to said axis, and directing a second ion implantation beam at an angle to and toward said substrate in a second direction opposite said first direction and parallel to said axis, whereby ion implantation is completed with implantation beams in only two directions.