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Anisotropic interconnect methodology for cost effective manufacture of high density printed circuit boards

Assignee: Dell USA LP
•
Filing: 1994-01-04
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Granted: 1995-10-10
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Expires: 2014-01-04
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Abstract

Abstract An interconnect sheet for connecting multiple layers of a circuit board for the manufacture of high interconnect density PWBs. The interconnect sheet preferably comprises an area array grid of 0.003 inch solder columns having a 0.006 inch pitch. The interconnect sheet is preferably used to attach two or more multi-layer boards by placing one sheet at every interconnect surface. This interconnect mechanism has an advantage of redundancy of contact and therefore lower susceptibility to failure than other methods. The interconnect sheet of the present invention also offers a large tolerance for registration error without shorting adjacent pads. The preferred method of fabrication of the interconnect sheet begins with creating equally spaced holes through a 0.5 ounce double sided laminate comprising a dielectric sheet and copper plates on either side of the dielectric. These holes are filled with solder paste and the sheet undergoes a baking process to shrink the paste. The remaining copper is then etched away using an alkaline etcher. The solder essentially acts as its own etch resist and thus remains. The solder is then reflowed causing it to ball, thus forming an interconnect sheet comprising a dielectric with a plurality of solder balls arranged throughout the dielectric.

Inventors

  • 👤 Deepak N. Swamy

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-09 19:40
CPC Classifications
H; H05; H05K; H05K3/00; H05K3/46; H05K3/4611; H05K3/4614; H05K3/462; B; B23; B23K; B23K35/00; B23K35/02; B23K35/0222; H05K3/30; H05K3/32; H05K3/34; H05K3/341; H05K3/3431; H05K3/3436; H05K3/36; H05K3/368; B23K35/0244; B23K35/025; H05K1/00; H05K1/02; H05K1/0272; H05K2201/00; H05K2201/09; H05K2201/09209; H05K2201/095; H05K2201/09536; H05K2201/10; H05K2201/10227; H05K2201/10378; H05K2201/10424; H05K2203/00; H05K2203/03; H05K2203/0376; H05K2203/04; H05K2203/043; H05K2203/05; H05K2203/0548; H05K2203/0554; H05K2203/0562; H05K2203/0568; H05K3/0011; H05K3/0017; H05K3/0026; H05K3/0032; H05K3/3465; H05K3/3485; H05K3/40; H05K3/4038; H05K3/4053; H05K3/4069; H05K3/4623; Y; Y02; Y02P; Y02P70/00; Y02P70/50; Y10; Y10T; Y10T29/00; Y10T29/49; Y10T29/49002; Y10T29/49117; Y10T29/49124; Y10T29/4913; Y10T29/49144; Y10T29/49155; Y10T29/49165; Y10T29/49204; Y10T29/49208; Y10T29/49222

Claims Analysis

Total Claims: 12
Claim 1
Independent Claim 90 words
A method of fabricating an interconnect sheet for connecting circuit board sections, comprising: drilling an array of holes through a sheet, wherein the sheet comprises a dielectric layer with a layer of material on at least one side of said dielectric layer; filling the array of holes with solder, wherein said solder bonds to said layer of material; etching away any remaining material after said step of filling, wherein said solder remains in said holes in said dielectric layer; and causing said solder to ball, thus forming the interconnect sheet.
Claim 2
Independent Claim 90 words
A method of fabricating an interconnect sheet for connecting circuit board sections, comprising: drilling an array of holes through a sheet, wherein the sheet comprises a dielectric layer with a layer of material on at least one side of said dielectric layer; filling the array of holes with solder, wherein said solder bonds to said layer of material; etching away any remaining material after said step of filling, wherein said solder remains in said holes in said dielectric layer; and causing said solder to ball, thus forming the interconnect sheet.
Claim 3
Dependent Claim 21 words
The method of claim 1, further comprising: baking the sheet to remove solvents from the solder after said step of filling.
Claim 4
Dependent Claim 41 words
The method of claim 1, wherein said step of drilling comprises: etching holes into said material layer comprising said sheet; and drilling holes through said dielectric, said holes through said dielectric being coaxial with said holes etched into said material layer.
Claim 5
Dependent Claim 31 words
The method of claim 1, wherein said step of drilling the array of holes comprises drilling holes having a diameter of approximately 0.003 inches and a pitch of approximately 0.006 inches.
Claim 6
Dependent Claim 33 words
The method of claim 1, wherein said step of causing said solder to ball comprises reflowing said solder comprised in said dielectric holes. The method of claim 1, wherein said material comprises copper.
Claim 7
Dependent Claim 10 words
The method of claim 1, wherein said material comprises copper.
Claim 8
Independent Claim 39 words
A method of fabricating an interconnect sheet for connecting circuit board sections, comprising: drilling an array of holes through a dielectric layer, filling the array of holes with solder; causing said solder to ball, thus forming the interconnect sheet.
Claim 9
Independent Claim 39 words
A method of fabricating an interconnect sheet for connecting circuit board sections, comprising: drilling an array of holes through a dielectric layer, filling the array of holes with solder; causing said solder to ball, thus forming the interconnect sheet.
Claim 10
Dependent Claim 22 words
The method of claim 7, further comprising: baking the dielectric layer to remove solvents from said solder after said step of filling.
Claim 11
Dependent Claim 31 words
The method of claim 7, wherein said step of drilling the array of holes comprises drilling holes having a diameter of approximately 0.003 inches and a pitch of approximately 0.006 inches.
Claim 12
Dependent Claim 23 words
The method of claim 7, wherein said step of causing said solder to ball comprises reflowing said solder comprised in said dielectric holes.

References Cited (Backward Citations)

JPS5544747A Cited
US4394712A Cited
JPS6072663A Cited
JPH01101699A Cited
US5229549A Cited
JPH0575253A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1998-10-09 1999-04-10 1999-10-10 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2002-10-09 2003-04-10 2003-10-10 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2006-10-09 2007-04-10 2007-10-10 $7700.00 Window Closed / Lapsed

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