Semiconductor device having a structure for accelerating carriers

Claim 2

A semiconductor device, comprising: a channel of a semiconductor material for passing carriers; carrier injecting means for injecting carriers into the channel at a first location of the channel; carrier collecting means for collecting carriers from the channel at a second, different location of the channel; carrier control means provided on the channel at a third location located between the first and second locations, said carrier control means being applied with a control voltage and controlling the passage of the carriers through the channel from the carrier injecting means to the carrier collecting means in response to the control voltage; and acceleration means provided between the first and third locations, said acceleration means being supplied with an acceleration voltage for producing an electric field that accelerates the carriers such that the electric field has a magnitude generally proportional to the acceleration voltage supplied to the acceleration means, said channel comprising a semiconductor layer having a upper major surface and a lower major surface, said first, second and third locations being defined on the upper major surface of the semiconductor layer that forms the channel such that the location is located between the first and second locations, said carrier injecting means and said carrier collecting means being provided on the upper major surface of the semiconductor layer forming the channel at said first and second locations respectively, said carrier control means being provided on the upper major surface of the semiconductor layer forming the channel at said third location, said carrier control means creating a depletion region in the semiconductor layer in response to the control voltage applied thereto, said acceleration means comprising a conductive region provided in the vicinity of the lower major surface of the semiconductor layer at a fourth location defined between the first and third locations including the third location.

Claim 3

A semiconductor device as claimed in claim 1 in which said semiconductor device further comprises a substrate having an upper major surface and a lower major surface, said substrate being provided such that the semiconductor layer is provided on the upper major surface of the substrate, said conductive region being embedded in the substrate.

Claim 4

A semiconductor device, comprising: a channel of a semiconductor material for passing carriers; a carrier injector for injecting carriers into the channel at a first location of the channel; a carrier collector for collecting carriers from the channel at a second, different location of the channel; a carrier controller provided on the channel at a third location located between the first and second locations, said carrier controller being applied with a control voltage and controlling passage of the carriers through the channel from the carrier injector to the carrier collector in response to the control voltage; and a carrier accelerator provided between the first and third locations, said accelerator establishing an ohmic contact with said channel and producing an electric field in said channel when supplied with an acceleration voltage that accelerates the carriers, said accelerator being constructed such that the electric field has a magnitude generally proportional to the acceleration voltage supplied to the acceleration, said device being constructed and arranged such that no electrode is positioned between the carrier injector and the carrier accelerator.

Claim 5

A semiconductor device, comprising: a channel of a semiconductor material for passing carriers; a carrier injector for injecting carriers into the channel at a first location of the channel; a carrier collector for collecting carriers from the channel at a second, different location of the channel; a carrier controller provided on the channel at a third location located between the first and second locations, said carrier controller being applied with a control voltage and controlling passage of the carriers through the channel from the carrier injector to the carrier collector in response to the control voltage; and a carrier accelerator provided between the first and third locations, said accelerator establishing an ohmic contact with said channel and producing an electric field in said channel when supplied with an acceleration voltage that accelerates the carriers, said accelerator being constructed such that the electric field has a magnitude generally proportional to the acceleration voltage supplied to the acceleration, said device being constructed and arranged such that no electrode is positioned between the carrier injector and the carrier accelerator.

Claim 6

A semiconductor device comprising: a channel for passing carriers, said channel comprising a semiconductor layer having an upper major surface and a lower major surface; a carrier injector for injecting carriers into the channel disposed at a first location on said upper major surface; a carrier collector for collecting carriers from the channel disposed at a second, different location on said upper major surface; a carrier controller provided on said upper major surface at a third location disposed between said first and second locations, said carrier controller being applied with a control voltage and controlling the passage of the carriers through the channel from the carrier injector to the carrier collector in response to the control voltage; and a carrier accelerator provided at a fourth location between the first and third locations, said accelerator establishing an ohmic contact with said channel and producing an electric field in the channel when supplied with an acceleration voltage that accelerates the carriers, said accelerator being constructed such that the electric field has a magnitude generally proportional to the acceleration voltage supplied to the accelerator, said carrier controller forming a depletion region in the semiconductor layer in response to the control voltage applied thereto, said accelerator comprising a conductive region formed in the semiconductor layer extending from the upper major surface to the lower major surface at said fourth location and an acceleration electrode provided on the upper major surface of the semiconductor layer in ohmic contact with the conductive region, said conductive region having a lateral thickness measured in a direction parallel to the upper major surface of the semiconductor layer and pointing toward the carrier collector from the carrier injector, such that the conductive region allows passage of the carriers therethrough by tunneling.

Claim 7

A semiconductor device comprising: a channel for passing carriers, said channel comprising a semiconductor layer having an upper major surface and a lower major surface; a carrier injector for injecting carriers into the channel disposed at a first location on said upper major surface; a carrier collector for collecting carriers from the channel disposed at a second, different location on said upper major surface; a carrier controller provided on said upper major surface at a third location disposed between said first and second locations, said carrier controller being applied with a control voltage and controlling the passage of the carriers through the channel from the carrier injector to the carrier collector in response to the control voltage; and a carrier accelerator provided at a fourth location between the first and third locations, said accelerator establishing an ohmic contact with said channel and producing an electric field in the channel when supplied with an acceleration voltage that accelerates the carriers, said accelerator being constructed such that the electric field has a magnitude generally proportional to the acceleration voltage supplied to the accelerator, said carrier controller forming a depletion region in the semiconductor layer in response to the control voltage applied thereto, said accelerator comprising a conductive region formed in the semiconductor layer extending from the upper major surface to the lower major surface at said fourth location and an acceleration electrode provided on the upper major surface of the semiconductor layer in ohmic contact with the conductive region, said conductive region having a lateral thickness measured in a direction parallel to the upper major surface of the semiconductor layer and pointing toward the carrier collector from the carrier injector, such that the conductive region allows passage of the carriers therethrough by tunneling.

Claim 8

A semiconductor device as claimed in claim 4 in which said fourth location is disposed closer to the third location than the first location.

Claim 9

A semiconductor device as claimed in claim 4 in which said carrier controller comprises a gate electrode provided on the upper major surface of the semiconductor layer.

Claim 10

A semiconductor device as claimed in claim 4 in which said carrier controller comprises an insulator layer having an upper major surface and a lower major surface provided at the upper major surface of the semiconductor layer and a control electrode provided on the upper major surface of the insulator layer.

Claim 11

A semiconductor device, comprising: a channel of a semiconductor material for passing carriers; a carrier injector for injecting carriers into the channel at a first location of the channel; a carrier collector for collecting carriers from the channel at a second, different location of the channel; a carrier controller provided on the channel at a third location located between the first and second locations, said carrier controller being applied with a control voltage and controlling the passage of the carriers through the channel from the carrier injector to the carrier collector in response to the control voltage; and a carrier accelerator provided between the first and third locations, said accelerator establishing an ohmic contact with said channel and producing an electric field in said channel when supplied with an acceleration voltage that accelerates the carriers, said accelerator being constructed such that the electric field has a magnitude generally proportional to the acceleration voltage supplied to the accelerator, said carrier controller comprising a plurality of conductive regions defining a plurality of passages for the carriers between adjacent conductive regions, said accelerator comprising a conductive plate-like region having first and second opposing major surfaces, said conductive plate-like region being provided such that said first and second major surfaces intersect a flow of the carriers, said conductive plate-like region having a thickness, measured across the first and second opposing major surfaces, such that the carriers pass through the plate-like region by tunneling.

Claim 12

A semiconductor device, comprising: a channel of a semiconductor material for passing carriers; a carrier injector for injecting carriers into the channel at a first location of the channel; a carrier collector for collecting carriers from the channel at a second, different location of the channel; a carrier controller provided on the channel at a third location located between the first and second locations, said carrier controller being applied with a control voltage and controlling the passage of the carriers through the channel from the carrier injector to the carrier collector in response to the control voltage; and a carrier accelerator provided between the first and third locations, said accelerator establishing an ohmic contact with said channel and producing an electric field in said channel when supplied with an acceleration voltage that accelerates the carriers, said accelerator being constructed such that the electric field has a magnitude generally proportional to the acceleration voltage supplied to the accelerator, said carrier controller comprising a plurality of conductive regions defining a plurality of passages for the carriers between adjacent conductive regions, said accelerator comprising a conductive plate-like region having first and second opposing major surfaces, said conductive plate-like region being provided such that said first and second major surfaces intersect a flow of the carriers, said conductive plate-like region having a thickness, measured across the first and second opposing major surfaces, such that the carriers pass through the plate-like region by tunneling.

Claim 13

A semiconductor device, comprising: a channel of a semiconductor material for passing carriers; a carrier injector for injecting carriers into the channel at a first location of the channel; a carrier collector for collecting carriers from the channel at a second, different location of the channel; a carrier controller provided on the channel at a third location located between the first and second locations, said carrier controller being applied with a control voltage and controlling the passage of the carriers through the channel from the carrier injector to the carrier collector in response to the control voltage; and a carrier accelerator provided between the first and third locations, said accelerator establishing an ohmic contact with said channel and producing an electric field in said channel when supplied with an acceleration voltage that accelerates the carriers, said accelerator being constructed such that the electric field has a magnitude generally proportional to the acceleration voltage supplied to the accelerator, said channel comprising an undoped semiconductor layer having an upper major surface and a lower major surface, a doped semiconductor layer having an upper major surface and a lower major surface provided on the upper major surface of the undoped semiconductor layer, and a two-dimensional carrier gas formed in the undoped semiconductor layer along the upper major surface thereof, said carrier injector including a source electrode provided on the upper major surface of the doped semiconductor layer and establishing ohmic contact with the doped semiconductor layer at a location in correspondence with said first location, said carrier collector including a drain electrode provided on the upper major surface of the doped semiconductor layer and establishing ohmic contact with the doped semiconductor layer at a location in correspondence with said second location, said carrier controller comprising a gate electrode provided on the upper major surface of the doped semiconductor layer in correspondence to said third location with a Schottky contact to the doped semiconductor layer, said accelerator comprising a conductive region formed in the doped semiconductor layer at a fourth location between the first and third locations so as to extend from the upper major surface to the lower major surface of the doped semiconductor layer into the undoped semiconductor layer such that the conductive region intersects the two-dimensional electron gas, and an ohmic electrode forming an ohmic contact with the conductive region.

Claim 14

A semiconductor device, comprising: a channel of a semiconductor material for passing carriers; a carrier injector for injecting carriers into the channel at a first location of the channel; a carrier collector for collecting carriers from the channel at a second, different location of the channel; a carrier controller provided on the channel at a third location located between the first and second locations, said carrier controller being applied with a control voltage and controlling the passage of the carriers through the channel from the carrier injector to the carrier collector in response to the control voltage; and a carrier accelerator provided between the first and third locations, said accelerator establishing an ohmic contact with said channel and producing an electric field in said channel when supplied with an acceleration voltage that accelerates the carriers, said accelerator being constructed such that the electric field has a magnitude generally proportional to the acceleration voltage supplied to the accelerator, said channel comprising an undoped semiconductor layer having an upper major surface and a lower major surface, a doped semiconductor layer having an upper major surface and a lower major surface provided on the upper major surface of the undoped semiconductor layer, and a two-dimensional carrier gas formed in the undoped semiconductor layer along the upper major surface thereof, said carrier injector including a source electrode provided on the upper major surface of the doped semiconductor layer and establishing ohmic contact with the doped semiconductor layer at a location in correspondence with said first location, said carrier collector including a drain electrode provided on the upper major surface of the doped semiconductor layer and establishing ohmic contact with the doped semiconductor layer at a location in correspondence with said second location, said carrier controller comprising a gate electrode provided on the upper major surface of the doped semiconductor layer in correspondence to said third location with a Schottky contact to the doped semiconductor layer, said accelerator comprising a conductive region formed in the doped semiconductor layer at a fourth location between the first and third locations so as to extend from the upper major surface to the lower major surface of the doped semiconductor layer into the undoped semiconductor layer such that the conductive region intersects the two-dimensional electron gas, and an ohmic electrode forming an ohmic contact with the conductive region.