Device for modular input high-speed multi-channel digitizing of electrical data

Claim 1

A device for modular input high-speed, multi-channel digitizing of electrical data comprising: a plurality of channels; computer interface means connected to each of said plurality of channels for producing a plurality of control commands and for providing data analysis to a computer and for receiving commands from said computer; programmable timing means connected to said computer interface means and to each of said plurality of channels for receiving one or more of said plurality of control commands and for providing a converter timing signal and a memory timing signal to operate said plurality of channels synchronously and at a fixed digitizing rate; wherein each of said plurality of channels comprises: signal switching means for receiving an external analog signal, an analog board reference calibration signal, and a second of said plurality of control commands and for providing a selected analog signal, wherein said selected analog signal is selected from either said external analog signal or said analog board reference calibration signal based upon said second of said plurality of control commands to said signal switching means; amplifier means connected to said signal switching means for receiving said selected analog signal and a third of said plurality of control commands; for amplifying said selected analog signal as a function of said third of said plurality of control commands to produce a conditioned analog signal; flash analog-to-digital converter means for receiving said conditioned analog signal and said converter timing signal and for providing a converted digital signal wherein said conditioned analog signal is converted to a converted digital signal upon receipt of certain converter timing signals; and, memory means for receiving said converted digital signal and said memory timing signal wherein said memory means stores a plurality of said converted digital signals upon receipt of said memory timing signal and provides a memory signal to said computer interface means upon receipt of certain timing signals thereby transferring said stored plurality of converted digital signals to said computer interface means.

Claim 2

A device for modular input high-speed, multi-channel digitizing of electrical data comprising: a plurality of channels; computer interface means connected to each of said plurality of channels for producing a plurality of control commands and for providing data analysis to a computer and for receiving commands from said computer; programmable timing means connected to said computer interface means and to each of said plurality of channels for receiving one or more of said plurality of control commands and for providing a converter timing signal and a memory timing signal to operate said plurality of channels synchronously and at a fixed digitizing rate; wherein each of said plurality of channels comprises: signal switching means for receiving an external analog signal, an analog board reference calibration signal, and a second of said plurality of control commands and for providing a selected analog signal, wherein said selected analog signal is selected from either said external analog signal or said analog board reference calibration signal based upon said second of said plurality of control commands to said signal switching means; amplifier means connected to said signal switching means for receiving said selected analog signal and a third of said plurality of control commands; for amplifying said selected analog signal as a function of said third of said plurality of control commands to produce a conditioned analog signal; flash analog-to-digital converter means for receiving said conditioned analog signal and said converter timing signal and for providing a converted digital signal wherein said conditioned analog signal is converted to a converted digital signal upon receipt of certain converter timing signals; and, memory means for receiving said converted digital signal and said memory timing signal wherein said memory means stores a plurality of said converted digital signals upon receipt of said memory timing signal and provides a memory signal to said computer interface means upon receipt of certain timing signals thereby transferring said stored plurality of converted digital signals to said computer interface means.

Claim 9

A device for modular input high, speed, multi-channel digitizing of electrical data, comprising: a plurality of channels; computer interface means connected to each of said plurality of channels for producing a plurality of control commands and for providing data analysis to a computer and for receiving commands from said computer, wherein said computer interface means comprises a IEEE P1155 VXI interface; programmable timing means connected to said computer interface means and to each of said plurality of channels for receiving one or more of said plurality of control commands and for providing a converter timing signal and a memory timing signal to operate said plurality of channels synchronously and at a fixed digitizing cycle rate of nominally 20 million samples per second whereby digitizing occurs at the same point in the cycle thus minimizing effects of cyclical noise; wherein each of said plurality of channels comprises: signal switching means for receiving an external analog signal, an analog board reference calibration signal, and other of said control commands and for providing a selected analog signal, wherein said selected analog signal is selected from either said external analog signal or said analog board reference calibration signal based upon said control commands to said signal switching means; amplifier means connected to said signal switching means for receiving said selected analog signal and other of said computer interface control commands for amplifying said selected analog signal as a function of said computer interface control commands to produce a conditioned analog signal, said amplifier means including a first amplifier which is a coarse adjustment amplifier with a plurality of ranges selected by other of said computer interface control commands and a second amplifier which is a fine adjustment variable amplifier coupled to a digital-to-analog converter, said digital-to-analog converter including an input for receiving other of said computer control commands and thereby providing a fine input amplification adjustment and calibration adjustment for said conditioned analog signal; flash analog-to-digital converter means for receiving said conditioned analog signal and said converter timing signal and for providing a converted digital signal wherein said conditioned analog signal is converted to a converted digital signal upon receipt of certain converter timing signals and wherein said flash analog to digital converter means includes a differential input flash analog to digital converter coupled to said amplifier means to reduce electronic noise effects; and, memory means for receiving said converted digital signal and said memory timing signal wherein said memory means stores a plurality of said digital signals upon receipt of certain said memory timing signal and provides a memory signal to said computer interface upon receipt of certain timing signals thereby transferring said plurality of stored digital signals to said computer interface.

Claim 10

A device for modular input high, speed, multi-channel digitizing of electrical data, comprising: a plurality of channels; computer interface means connected to each of said plurality of channels for producing a plurality of control commands and for providing data analysis to a computer and for receiving commands from said computer, wherein said computer interface means comprises a IEEE P1155 VXI interface; programmable timing means connected to said computer interface means and to each of said plurality of channels for receiving one or more of said plurality of control commands and for providing a converter timing signal and a memory timing signal to operate said plurality of channels synchronously and at a fixed digitizing cycle rate of nominally 20 million samples per second whereby digitizing occurs at the same point in the cycle thus minimizing effects of cyclical noise; wherein each of said plurality of channels comprises: signal switching means for receiving an external analog signal, an analog board reference calibration signal, and other of said control commands and for providing a selected analog signal, wherein said selected analog signal is selected from either said external analog signal or said analog board reference calibration signal based upon said control commands to said signal switching means; amplifier means connected to said signal switching means for receiving said selected analog signal and other of said computer interface control commands for amplifying said selected analog signal as a function of said computer interface control commands to produce a conditioned analog signal, said amplifier means including a first amplifier which is a coarse adjustment amplifier with a plurality of ranges selected by other of said computer interface control commands and a second amplifier which is a fine adjustment variable amplifier coupled to a digital-to-analog converter, said digital-to-analog converter including an input for receiving other of said computer control commands and thereby providing a fine input amplification adjustment and calibration adjustment for said conditioned analog signal; flash analog-to-digital converter means for receiving said conditioned analog signal and said converter timing signal and for providing a converted digital signal wherein said conditioned analog signal is converted to a converted digital signal upon receipt of certain converter timing signals and wherein said flash analog to digital converter means includes a differential input flash analog to digital converter coupled to said amplifier means to reduce electronic noise effects; and, memory means for receiving said converted digital signal and said memory timing signal wherein said memory means stores a plurality of said digital signals upon receipt of certain said memory timing signal and provides a memory signal to said computer interface upon receipt of certain timing signals thereby transferring said plurality of stored digital signals to said computer interface.