US5453704A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Sense amplifier with positive feedback and self-biasing to achieve full voltage swing
Assignee: Fujitsu Ltd
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Filing: 1993-10-29
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Granted: 1995-09-26
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Expires: 2013-10-29
Abstract
Abstract A level shift amplifier has first to n th inverters connected in series, with each positive voltage terminal of the first to n th inverter is connected to the first source line. Each negative voltage terminal of the first to (n-2)th inverter is connected to output of the second next inverter, respectively. The negative voltage terminal of the (n-1)th inverter is connected to a part of the output of the n th inverter, and the negative voltage terminal of the n th inverter is connected to the second source line. n pieces of feedback elements are connected between the input and output of each inverter. When a feedback element is established so that the gain of each inverter can be maximized, a self-bias amplifier circuit is composed. All inverters are driven by the self-bias voltage. The fine amplitude signals input to the first inverter become the output voltage of full amplitude between the first and second source lines in the n-th inverter. Also, a positive feedback circuit is composed, and the amplification factor of the level shift amplifier is enhanced.
Inventors
- 👤 Shoichiro Kawashima
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-04 04:05
CPC Classifications
H; H03; H03K; H03K19/00; H03K19/0175; H03K19/0185; H03K19/018507; H03K19/018521; H03K19/018; H03K19/01806
Claims Analysis
Total Claims: 12
Claim 1
Independent Claim
115 words
A level shift amplifier comprising: (a) first to n th inverters connected in cascade, (1) each positive voltage terminal of the first to n th inverter is connected to a first source line, (2) each negative voltage terminal of the first to (n-2)th inverter is connected to output of the second next adjacent inverter respectively, (3) the negative voltage terminal of the (n-1)th inverter is connected to a voltage divider receiving output of the n th inverter, and (4) the negative voltage terminal of the n th inverter is connected to a second source line; and (b) n feedback elements connected between the input and output of each inverter and in cascade to each other.
Claim 2
Dependent Claim
115 words
A level shift amplifier comprising: (a) first to n th inverters connected in cascade, (1) each positive voltage terminal of the first to n th inverter is connected to a first source line, (2) each negative voltage terminal of the first to (n-2)th inverter is connected to output of the second next adjacent inverter respectively, (3) the negative voltage terminal of the (n-1)th inverter is connected to a voltage divider receiving output of the n th inverter, and (4) the negative voltage terminal of the n th inverter is connected to a second source line; and (b) n feedback elements connected between the input and output of each inverter and in cascade to each other.
Claim 3
Dependent Claim
35 words
A level shift amplifier according to claim 1, wherein said first to (n-2)th inverters include a low pass filter circuit between the negative voltage terminal and the output of the second next adjacent inverter respectively.
Claim 4
Dependent Claim
34 words
A level shift amplifier according to claim 1, wherein said (n-1)th inverter include a low pass filter circuit between the negative voltage terminal and the voltage divider receiving output of the n th inverter.
Claim 5
Dependent Claim
26 words
A level shift amplifier according to claim 1, wherein said inverters each include: a p type field effect transistor and an n type field effect transistor.
Claim 6
Dependent Claim
24 words
A level shift amplifier according to claim 1, wherein said inverters each include: a pnp type bipolar transistor and an npn type bipolar transistor.
Claim 7
Dependent Claim
314 words
A level shift amplifier comprising: (a) a first cascade of first to n th inverters connected in cascade and first inverter receiving a first signal, (1) each positive voltage terminal of the first to n th inverter connected to a first source line, (2) each negative voltage terminal of the first to (n-2)th inverter is connected to negative voltage terminal of the first to (n-2)th inverter respectively, in which is connected to a voltage divider receiving output of the second next inverter respectively, (3) the negative voltage terminal of the (n-1)th inverter is connected to the negative voltage terminal of the (n-1)th inverter which is connected to a voltage divider receiving output of the n th inverter at the positive sequence side and the negative sequence side, and (4) the negative voltage terminal the n th inverter at the positive sequence side is connected to the second source line; (b) a second cascade of first to n th inverters connected in cascade and first inverter receiving complement of first signal, (1) each positive voltage terminal of the first to n th inverter is connected to the first source line, (2) each negative voltage terminal of the first to (n-2)th inverter is connected to negative voltage terminal of the first to (n-2)th inverter respectively, in which is connected to a part of the output of the second next inverter respectively, (3) the negative voltage terminal of the (n-1)th inverter is connected to the negative voltage terminal of the (n-1)th inverter which is connected to a part of the output of the n th inverter, and (4) the negative voltage terminal of the n th inverter is connected to the second source line; (c) n pieces of feedback elements are connected between the input and output of each inverter; and (d) n pieces of feedback elements are connected between the input and output of each inverter.
Claim 8
Dependent Claim
314 words
A level shift amplifier comprising: (a) a first cascade of first to n th inverters connected in cascade and first inverter receiving a first signal, (1) each positive voltage terminal of the first to n th inverter connected to a first source line, (2) each negative voltage terminal of the first to (n-2)th inverter is connected to negative voltage terminal of the first to (n-2)th inverter respectively, in which is connected to a voltage divider receiving output of the second next inverter respectively, (3) the negative voltage terminal of the (n-1)th inverter is connected to the negative voltage terminal of the (n-1)th inverter which is connected to a voltage divider receiving output of the n th inverter at the positive sequence side and the negative sequence side, and (4) the negative voltage terminal the n th inverter at the positive sequence side is connected to the second source line; (b) a second cascade of first to n th inverters connected in cascade and first inverter receiving complement of first signal, (1) each positive voltage terminal of the first to n th inverter is connected to the first source line, (2) each negative voltage terminal of the first to (n-2)th inverter is connected to negative voltage terminal of the first to (n-2)th inverter respectively, in which is connected to a part of the output of the second next inverter respectively, (3) the negative voltage terminal of the (n-1)th inverter is connected to the negative voltage terminal of the (n-1)th inverter which is connected to a part of the output of the n th inverter, and (4) the negative voltage terminal of the n th inverter is connected to the second source line; (c) n pieces of feedback elements are connected between the input and output of each inverter; and (d) n pieces of feedback elements are connected between the input and output of each inverter.
Claim 9
Dependent Claim
40 words
A level shift amplifiers according to claim 6, wherein said first to (n-2)th inverters include a low pass filter circuit between the junction of the negative voltage terminal and the voltage divider receiving output of the second next inverter respectively.
Claim 10
Dependent Claim
37 words
A level shift amplifier according to claim 6, wherein said (n-1)th inverter includes a low pass filter circuit between the junction of the negative voltage terminal and a part of the output of the n th inverter.
Claim 11
Dependent Claim
25 words
A level shift amplifier according to claim 6, wherein each of said inverters include: p type field effect transistors and n type field effect transistors.
Claim 12
Dependent Claim
23 words
A level shift amplifier according to claim 6, wherein each of said inverters include: pnp type bipolar transistors and npn type bipolar transistors.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1998-09-25 | 1999-03-27 | 1999-09-26 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2002-09-25 | 2003-03-27 | 2003-09-26 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2006-09-25 | 2007-03-27 | 2007-09-26 | $7700.00 | Window Closed / Lapsed |