Patent US5453402A successfully refreshed from Google Patents.
US5453402A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Selective metal via plug growth technology for deep sub-micrometer ULSI
Assignee: Advanced Micro Devices Inc
•
Filing: 1992-12-15
•
Granted: 1995-09-26
•
Expires: 2012-12-15
Abstract
Abstract Metal pillars (18) having diameters of less than about 1.0 μm are grown in vias (16) in dielectric layers (14) between metal layers (12, 22) by a process comprising: (a) forming a first metal layer (12) at a first temperature and patterning the metal layer; (b) forming the dielectric layer to encapsulate the first patterned metal layer, the dielectric layer having a compressive stress of at least about 100 MegaPascal and being formed at a second temperature; (c) opening vias in the dielectric layer to exposed underlying portions of the patterned metal layer, the vias being less than about 1.0 μm in diameter; (d) heating the semiconductor wafer at a temperature that is greater than either the first or second temperatures to induce growth of metal in the vias from the metal layer; and (e) forming the second metal layer (22) over the dielectric layer to make contact with the metal pillars.
Inventors
- 👤 Robin W. Cheung
- 👤 Seshadri Ramaswami
- 👤 David F. Kyser
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-04 23:23
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/01; H10W20/031; H10W20/056; H10W20/057
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
185 words
A process for interconnecting a first layer of metal with a second layer of metal in which an inter-layer dielectric film is formed on said first metal layer and said second metal layer is then formed on said dielectric film, comprising: (a) forming said first metal layer at a first temperature over a semiconductor substrate and patterning said first metal layer to form patterned metal regions; (b) forming said inter-layer dielectric film on said first patterned metal layer, said inter-layer dielectric film encapsulating said first patterned metal regions and having a compressive stress of at least about 100 MegaPascal and being formed at a second temperature; (c) opening vias in said inter-layer dielectric film to expose underlying portions of said first patterned metal layer, said vias being less than about 1.0 μm in diameter; (d) heating said semiconductor substrate at a temperature that is greater than said first and second temperatures to induce growth of metal in said vias from said first metal layer to form metal pillars; and (e) forming said second metal layer on said inter-layer dielectric film to contact said metal pillars.
Claim 2
Dependent Claim
185 words
A process for interconnecting a first layer of metal with a second layer of metal in which an inter-layer dielectric film is formed on said first metal layer and said second metal layer is then formed on said dielectric film, comprising: (a) forming said first metal layer at a first temperature over a semiconductor substrate and patterning said first metal layer to form patterned metal regions; (b) forming said inter-layer dielectric film on said first patterned metal layer, said inter-layer dielectric film encapsulating said first patterned metal regions and having a compressive stress of at least about 100 MegaPascal and being formed at a second temperature; (c) opening vias in said inter-layer dielectric film to expose underlying portions of said first patterned metal layer, said vias being less than about 1.0 μm in diameter; (d) heating said semiconductor substrate at a temperature that is greater than said first and second temperatures to induce growth of metal in said vias from said first metal layer to form metal pillars; and (e) forming said second metal layer on said inter-layer dielectric film to contact said metal pillars.
Claim 3
Dependent Claim
15 words
The process of claim 1 wherein said first temperature is less than said second temperature.
Claim 4
Dependent Claim
16 words
The process of claim 1 wherein said first metal layer comprises aluminum or an aluminum alloy.
Claim 5
Dependent Claim
25 words
The process of claim 1 wherein said inter-layer dielectric film is selected from the group consisting of SiO 2 and Si 3 N 4 .
Claim 6
Dependent Claim
21 words
The process of claim 1 wherein said inter-layer dielectric film is formed at a temperature of about 300° to 400° C.
Claim 7
Dependent Claim
16 words
The process of claim 1 wherein said compressive stress ranges from about 100 to 800 MegaPascal.
Claim 8
Dependent Claim
25 words
The process of claim 1 wherein said heating in step (d) is done at a temperature of greater than about 300° to about 550° C.
Claim 9
Dependent Claim
26 words
The process of claim 1 further comprising forming an anti-reflection coating on said first metal layer, then forming said inter-layer dielectric film on said anti-reflection coating.
Claim 10
Dependent Claim
36 words
The process of claim 8 wherein after forming said vias in step (c), said anti-reflection coating covering said first metal layer that is exposed in said vias is removed prior to said heating in step (d).
References Cited (Backward Citations)
US4968643A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1998-09-25 | 1999-03-27 | 1999-09-26 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2002-09-25 | 2003-03-27 | 2003-09-26 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2006-09-25 | 2007-03-27 | 2007-09-26 | $7700.00 | Window Closed / Lapsed |