US5452006A
Expired / Lapsed
US
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Two-part synchronization scheme for digital video decoders
Assignee: Avago Technologies International Sales Pte Ltd
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Filing: 1993-10-25
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Granted: 1995-09-19
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Expires: 2013-10-25
Abstract
Abstract A novel synchronization scheme for use in connection with digital signal video decoder comprises a pre-parser, a channel buffer, and a post-parser. The pre-parser synchronizes to a multiplexed system bitstream received from a fixed rate channel. The video bitstream component of a multiplexed system bitstream is then extracted and synchronized prior to being transferred bit-serially from the pre-parser to a channel buffer. The post-parser is coupled to the channel buffer and to a video decoder in a series configuration. The post-parser separates the various layers of video data from the video bitstream component. The post-parser performs a translation operation on the video bitstream component and converts the bitstream data into symbol data. The symbol data is subsequently processed by the video decoder so as to reconstruct an originally encoded picture or frame. Preferably, the multiplexed system bitstream data structure conforms to some format agreed upon among video digital businesses involved in transmission and reception. In accordance with one aspect of the present invention, the pre-parser and the post-parser operate independent of each other, and operate at different processing rates.
Inventors
- 👤 David R. Auld
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-25 14:42
CPC Classifications
H; H04; H04N; H04N19/00; H04N19/60; H04N19/61; H04N19/70
Claims Analysis
Total Claims: 33
Claim 1
Independent Claim
95 words
A signal decoding system comprising: a first synchronizing means, having an input coupled to a transmission channel, for synchronizing to a variable bit-rate coded signal received from said input, and for parsing a portion of said variable bit-rate coded signal; a buffer having an input coupled to an output of said first synchronizing means; a decoder, coupled to an output of said buffer, for decoding said portion of said variable bit-rate coded signal; and a second synchronizing means, disposed between said buffer and said decoder, for parsing said portion of said variable bit-rate coded signal.
Claim 2
Dependent Claim
95 words
A signal decoding system comprising: a first synchronizing means, having an input coupled to a transmission channel, for synchronizing to a variable bit-rate coded signal received from said input, and for parsing a portion of said variable bit-rate coded signal; a buffer having an input coupled to an output of said first synchronizing means; a decoder, coupled to an output of said buffer, for decoding said portion of said variable bit-rate coded signal; and a second synchronizing means, disposed between said buffer and said decoder, for parsing said portion of said variable bit-rate coded signal.
Claim 3
Dependent Claim
27 words
A signal decoding system as defined in claim 1 wherein the input of said first synchronizing means and said transmission channel are coupled in a series configuration.
Claim 4
Dependent Claim
23 words
A signal decoding system as defined in claim 2 wherein said variable bit-rate coded signal is processed bit-serially by said first synchronizing means.
Claim 5
Dependent Claim
24 words
A signal decoding system as defined in claim 1 wherein said first synchronizing means further includes means for aligning said variable bit-rate coded signal.
Claim 6
Dependent Claim
22 words
A signal decoding system as defined in claim 1 wherein said parsed portion of said variable bit-rate coded signal comprises video information.
Claim 7
Dependent Claim
22 words
A signal decoding system as defined in claim 1 wherein said parsed portion of said variable bit-rate coded signal comprises audio information.
Claim 8
Dependent Claim
23 words
A signal decoding system as defined in claim 1 wherein a structure of said variable bit-rate coded signal conforms to an MPEG format.
Claim 9
Dependent Claim
39 words
A signal decoding system as defined in claim 1 further comprising a multiplexer for selectably switching the input to said first synchronizer means between said transmission channel and a second signal source providing a second variable bit-rate coded signal.
Claim 10
Dependent Claim
23 words
A signal decoding system as defined in claim 1 further including means for parsing a video portion of said variable bit-rate coded signal.
Claim 11
Dependent Claim
24 words
A signal decoding system as defined in claim 1 further including a channel write buffer disposed between said buffer and said first synchronizing means.
Claim 12
Dependent Claim
23 words
A signal decoding system as defined in claim 1 wherein said second synchronizing means and said decoder are coupled in a parallel configuration.
Claim 13
Dependent Claim
31 words
A signal decoding system as defined in claim 1 wherein the synchronizing and parsing performed by said first synchronizing means are executed independent of the operations of said second synchronizing means.
Claim 14
Dependent Claim
26 words
A signal decoding system as defined in claim 1 wherein said second synchronizing means includes means for translating said parsed portion of said variable bit-rate signal.
Claim 15
Dependent Claim
22 words
A signal decoding system as defined in claim 1 wherein said second synchronizing means includes means for detecting and masking synchronizing errors.
Claim 16
Dependent Claim
33 words
A signal decoding system as defined in claim 1 wherein said first synchronizing means accepts variable bit-rate coded signals from said transmission channel at transmission rates between 1 and 16 megabits per second.
Claim 17
Dependent Claim
89 words
A signal decoding system comprising: a first synchronizing means for receiving a multiplexed bitstream from a transmission channel, said multiplexed bitstream comprising at least an audio bitstream and a video bitstream; means, coupled to said first synchronizing means, for parsing a video bitstream from said multiplexed bitstream; a channel buffer, coupled to said parsing means, receiving said video bitstream; a second synchronizing means, coupled to said channel buffer, for further parsing said video bitstream; and a decoder, coupled to said second synchronizing means, for decoding said parsed video bitstream.
Claim 18
Dependent Claim
89 words
A signal decoding system comprising: a first synchronizing means for receiving a multiplexed bitstream from a transmission channel, said multiplexed bitstream comprising at least an audio bitstream and a video bitstream; means, coupled to said first synchronizing means, for parsing a video bitstream from said multiplexed bitstream; a channel buffer, coupled to said parsing means, receiving said video bitstream; a second synchronizing means, coupled to said channel buffer, for further parsing said video bitstream; and a decoder, coupled to said second synchronizing means, for decoding said parsed video bitstream.
Claim 19
Dependent Claim
21 words
A signal decoding system as defined in claim 16 wherein said multiplexed bitstream is processed bit-serially by said first synchronizing means.
Claim 20
Dependent Claim
21 words
A signal decoding system as defined in claim 16 wherein a structure of said multiplexed bitstream conforms to an MPEG format.
Claim 21
Dependent Claim
36 words
A signal decoding system as defined in claim 16 further comprising a multiplexer for selectably switching the input to said first synchronizer means between said transmission channel and a second signal source providing a video bitstream.
Claim 22
Dependent Claim
24 words
A signal decoding system as defined in claim 16 further including a channel write buffer disposed between said buffer and said first synchronizing means.
Claim 23
Dependent Claim
21 words
A signal decoding system as defined in claim 16 wherein said second synchronizing means and said decoder are coupled in parallel.
Claim 24
Dependent Claim
28 words
A signal decoding system as defined in claim 16 wherein operations performed by said first synchronizing means are executed independent of operations performed by said second synchronizing means.
Claim 25
Dependent Claim
23 words
A signal decoding system as defined in claim 16 wherein said second synchronizing means further includes means for translating said parsed video bitstream.
Claim 26
Dependent Claim
25 words
A signal decoding system as defined in claim 16 further including a channel read buffer disposed between said channel buffer and said second synchronization means.
Claim 27
Dependent Claim
56 words
A process of decoding a bitstream comprising the steps of: receiving a multiplexed bitstream from a transmission channel, the multiplexed bitstream including at least a video bitstream; synchronizing to the received multiplexed bitstream; parsing the video bitstream from the synchronized multiplexed bitstream; transferring the video bitstream to a channel buffer; further parsing the video bitstream; and
Claim 28
Dependent Claim
56 words
A process of decoding a bitstream comprising the steps of: receiving a multiplexed bitstream from a transmission channel, the multiplexed bitstream including at least a video bitstream; synchronizing to the received multiplexed bitstream; parsing the video bitstream from the synchronized multiplexed bitstream; transferring the video bitstream to a channel buffer; further parsing the video bitstream; and
Claim 29
Dependent Claim
21 words
The process of claim 25 including the further step of switching between said transmission channel and an external video bitstream source.
Claim 30
Dependent Claim
18 words
The process of claim 25 wherein the multiplexed bitstream has a structure that conforms to an MPEG format.
Claim 31
Dependent Claim
41 words
The process of claim 25 wherein the steps of synchronizing to the bitstream and parsing the video bitstream from the synchronized multiplexed bitstream proceed independently with respect to the steps of parsing the video bitstream and decoding the parsed video bitstream.
Claim 32
Dependent Claim
17 words
The process of claim 25 wherein the step of synchronizing to the multiplexed bitstream is performed bit-serially.
Claim 33
Dependent Claim
20 words
The process of claim 25 wherein the step of further parsing the video bitstream is performed in a parallel manner.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1998-09-18 | 1999-03-20 | 1999-09-19 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2002-09-18 | 2003-03-20 | 2003-09-19 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2006-09-18 | 2007-03-20 | 2007-09-19 | $7700.00 | Window Closed / Lapsed |