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US5448707A Expired / Lapsed US ⏱️ 0.0 years remaining

Mechanism to protect data saved on a local register cache during inter-subsystem calls and returns

Assignee: Intel Corp
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Filing: 1994-03-29
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Granted: 1995-09-05
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Expires: 2014-03-29
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Abstract

Abstract An apparatus for protecting the data in a local register cache during calls and returns that cross subsystem boundaries. The left most bit of a shift register is set to a 1 if a "set boundary bit" instruction is detected. A subsequent PUSH instruction shifts the shift register right one bit. A POPTOS1 instruction in the instruction flow signifies an intra-subsystem return and causes the leftmost bit of the shift register to be checked to see if it is a zero. A protection fault is signalled upon the condition that the leftmost bit is not equal to zero. The shift register is shifted left one bit upon the condition that a POPSTOS 2 instruction is detected. A POPSUB1 instruction detected in the instruction flow signifies an inter-subsystem return and causes the leftmost bit of the shift register to be checked to see if it is a one. A a protection fault is signalled upon the condition that the leftmost bit is not equal to zero. The register is shifted left one bit upon the condition that a POPSTOS 2 instruction is detected in the instruction flow.

Inventors

  • 👤 Glenn J. Hinton
  • 👤 Gyanendra Tiwary

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-08 06:16
CPC Classifications
G; G06; G06F; G06F9/00; G06F9/06; G06F9/30; G06F9/30003; G06F9/30076; G06F9/30087; G06F9/3004; G06F9/38; G06F9/3861; G06F9/44; G06F9/448; G06F9/4482; G06F9/4484

Claims Analysis

Total Claims: 9
Claim 1
Independent Claim 169 words
A method of protecting intersubsystem calls and returns that cross subsystem boundaries comprising steps of: A. Detecting a "set boundary bit" instruction as part of a first instruction flow for an inter-subsystem call; B. Setting a left most bit of a shift register to a 1 upon a first condition that said "set boundary bit" instruction is detected; C. Detecting a first instruction signifying an intra-subsystem call; D. Asserting a PUSH line in response to said detecting said first instruction; E. Shifting said shift register right one bit upon a second condition that said PUSH line is asserted; F. Detecting a second instruction signifying an intra-subsystem return; G. Asserting a POPTO2 line in response to said detecting said second instruction; H. Checking said leftmost bit of said shift register for a zero; I. Signaling a protection fault upon a condition that said leftmost bit is not zero; and, J. Shifting said register shift left one bit upon a condition that a third instruction following said second instruction is detected.
Claim 2
Independent Claim 169 words
A method of protecting intersubsystem calls and returns that cross subsystem boundaries comprising steps of: A. Detecting a "set boundary bit" instruction as part of a first instruction flow for an inter-subsystem call; B. Setting a left most bit of a shift register to a 1 upon a first condition that said "set boundary bit" instruction is detected; C. Detecting a first instruction signifying an intra-subsystem call; D. Asserting a PUSH line in response to said detecting said first instruction; E. Shifting said shift register right one bit upon a second condition that said PUSH line is asserted; F. Detecting a second instruction signifying an intra-subsystem return; G. Asserting a POPTO2 line in response to said detecting said second instruction; H. Checking said leftmost bit of said shift register for a zero; I. Signaling a protection fault upon a condition that said leftmost bit is not zero; and, J. Shifting said register shift left one bit upon a condition that a third instruction following said second instruction is detected.
Claim 3
Dependent Claim 54 words
The method in accordance with claim 1 further comprising steps of: K. Detecting a fourth instruction in a second instruction flow signifying an inter-subsystem return; L. Checking said leftmost bit of said shift register for a one; and, M. Signaling a protection fault upon a condition that said leftmost bit is not a one.
Claim 4
Independent Claim 245 words
An apparatus for protecting intersubsystem calls and returns that cross subsystem boundaries comprising: a shift register; first decoder means connected to said shift register for detecting a "set boundary bit" instruction as part of the flow for an inter-subsystem call; second means connected to said first decoder means and to said shift register for setting a left most bit of said shift register to a 1 if said "set boundary bit" instruction is detected; multiple decoder means for detecting an intra-subsytem call instruction, an intra-subsytem return instruction, and a first instruction following said intra-subsytem return instruction; a PUSH line connected between said multiple decoder means and said shift register; a POPTOS2 line connected between said multiple decoder means decoder and said shift register; right shift means connected to said multiple decoder means for shifting said shift register right one bit upon detection of said intra-subsytem call instruction; zero bit comparison means, connected to said shift register and to said multiple decoder means, for checking said leftmost bit of said shift register for a zero; inter-subsytem return fault detection means connected to said zero bit comparison means for signaling a protection fault upon a first condition that said leftmost bit is not zero concurrently with a detection of said inter-subsystem return instruction by said multiple decoder means; and, left shift means connected to said multiple decoder means for shifting said register shift left one bit upon detection of said first instruction following said intra-subsytem return instruction.
Claim 5
Independent Claim 245 words
An apparatus for protecting intersubsystem calls and returns that cross subsystem boundaries comprising: a shift register; first decoder means connected to said shift register for detecting a "set boundary bit" instruction as part of the flow for an inter-subsystem call; second means connected to said first decoder means and to said shift register for setting a left most bit of said shift register to a 1 if said "set boundary bit" instruction is detected; multiple decoder means for detecting an intra-subsytem call instruction, an intra-subsytem return instruction, and a first instruction following said intra-subsytem return instruction; a PUSH line connected between said multiple decoder means and said shift register; a POPTOS2 line connected between said multiple decoder means decoder and said shift register; right shift means connected to said multiple decoder means for shifting said shift register right one bit upon detection of said intra-subsytem call instruction; zero bit comparison means, connected to said shift register and to said multiple decoder means, for checking said leftmost bit of said shift register for a zero; inter-subsytem return fault detection means connected to said zero bit comparison means for signaling a protection fault upon a first condition that said leftmost bit is not zero concurrently with a detection of said inter-subsystem return instruction by said multiple decoder means; and, left shift means connected to said multiple decoder means for shifting said register shift left one bit upon detection of said first instruction following said intra-subsytem return instruction.
Claim 6
Dependent Claim 101 words
The apparatus in accordance with claim 3 wherein said multiple decoder means further includes means for detecting an inter-subsystem return instruction and said fourth means includes ninth means for detecting a POPSUB1 instruction in the instruction flow signifying an inter-subsystem return; said apparatus further comprising: one bit comparison means connected to said shift register and to said multiple decoder means, for checking said leftmost bit of said shift register for a one; and, intra-subsytem return fault detection means connected to said one bit comparison means for signaling a protection fault upon a second condition that said leftmost bit is not zero.
Claim 7
Independent Claim 383 words
An apparatus for protecting inter subsystem calls and returns that cross subsystem boundaries comprising: a subsystem call subsystem return decoder; a shift register connected to said subsystem call subsystem return decoder; a PUSH line connected between said subsystem call subsystem return decoder and said shift register; a POPTOS2 line connected between said subsystem call subsystem return decoder and said shift register; said subsystem call subsystem return decoder first logic that asserts said PUSH line upon a decoding of a subsystem call instruction; said subsystem call subsystem return decoder including second logic that asserts said POPTOS2 line upon a decoding of a subsystem return instruction; a set boundary bit decoder; a stcp0 line connected between said set boundary bit decoder and said shift register; said set boundary bit decoder including a third logic that detects a set boundary bit instruction as part of a flow for an inter-subsystem call and asserts said stcp0 line in response a detection of said set boundary bit instruction; assertion of said stcp0 line causing a leftmost bit of said shift register to be set; assertion of said PUSH line causing said shift register to shift right one bit position; assertion of said POPTOS2 line causing said shift register to shift left one bit position; said subsystem call subsystem return decoder including a fourth logic that asserts said POPTOS2 line upon a decoding of said POP instruction; said subsystem call subsystem return decoder including a fifth logic that asserts said PUSH line upon a decoding of said PUSH instruction; a bit 0 line output from said shift register; said bit 0 line being asserted upon a first condition that said 0 bit of said shift register is a 0 and being unasserted upon a second condition that said 0 bit of said shift register is a 1; and, a comparison logic connected to said bit 0 line, to said POPTOS2 line and to said PUSH line; said comparison logic including a fault line output; said comparing logic comparing said POPTOS2 line and said PUSH line with said bit 0 line, said fault line being asserted upon a condition that said POPTOS2 line is asserted and said bit 0 line is not asserted and upon a condition that said PUSH line is asserted and said bit 0 line is asserted.
Claim 8
Independent Claim 383 words
An apparatus for protecting inter subsystem calls and returns that cross subsystem boundaries comprising: a subsystem call subsystem return decoder; a shift register connected to said subsystem call subsystem return decoder; a PUSH line connected between said subsystem call subsystem return decoder and said shift register; a POPTOS2 line connected between said subsystem call subsystem return decoder and said shift register; said subsystem call subsystem return decoder first logic that asserts said PUSH line upon a decoding of a subsystem call instruction; said subsystem call subsystem return decoder including second logic that asserts said POPTOS2 line upon a decoding of a subsystem return instruction; a set boundary bit decoder; a stcp0 line connected between said set boundary bit decoder and said shift register; said set boundary bit decoder including a third logic that detects a set boundary bit instruction as part of a flow for an inter-subsystem call and asserts said stcp0 line in response a detection of said set boundary bit instruction; assertion of said stcp0 line causing a leftmost bit of said shift register to be set; assertion of said PUSH line causing said shift register to shift right one bit position; assertion of said POPTOS2 line causing said shift register to shift left one bit position; said subsystem call subsystem return decoder including a fourth logic that asserts said POPTOS2 line upon a decoding of said POP instruction; said subsystem call subsystem return decoder including a fifth logic that asserts said PUSH line upon a decoding of said PUSH instruction; a bit 0 line output from said shift register; said bit 0 line being asserted upon a first condition that said 0 bit of said shift register is a 0 and being unasserted upon a second condition that said 0 bit of said shift register is a 1; and, a comparison logic connected to said bit 0 line, to said POPTOS2 line and to said PUSH line; said comparison logic including a fault line output; said comparing logic comparing said POPTOS2 line and said PUSH line with said bit 0 line, said fault line being asserted upon a condition that said POPTOS2 line is asserted and said bit 0 line is not asserted and upon a condition that said PUSH line is asserted and said bit 0 line is asserted.
Claim 9
Dependent Claim 86 words
The apparatus in accordance with claim 5 wherein said subsystem call subsystem return decoder further includes means for detecting an inter-subsystem return instruction and for detecting a POPSUB1 instruction in the instruction flow signifying an inter-subsystem return; said apparatus further comprising: one bit comparison means connected to said shift register and to said subsystem call subsystem return decoder; and, intra-subsystem return fault detection means connected to said one bit comparison means for signaling a protection fault upon a condition that said leftmost bit is not zero.

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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1998-09-04 1999-03-06 1999-09-05 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2002-09-04 2003-03-06 2003-09-05 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2006-09-04 2007-03-06 2007-09-05 $7700.00 Window Closed / Lapsed

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