Claims Analysis
Total Claims: 16
Claim 1
Independent Claim
224 words
A current source for providing a current proportional to absolute temperature, comprising: a first current mirror having first and second current flow paths, and including first and second bipolar transistors; a resistor connected between the bases of said first and second bipolar transistors; a second current mirror having current flow paths connected in series with the respective first and second current flow paths of said first current mirror, and including first and second MOS transistors; third and fourth bipolar transistors connected respectively in said first and second current flow paths; a startup current source connected between a reference potential and the gates of said first and second MOS transistors; third, fourth and fifth MOS transistors having their source/drain paths connected in series between a supply voltage and the reference potential, said third MOS transistor having its gate connected to the gates of said first and second MOS transistors, the fourth MOS transistor having its gate connected to the base of said first bipolar transistor, and the fifth MOS transistor having its gate connected to a node in the second current flow path between the second and fourth bipolar transistors and having its source/drain path connected between the base of said first bipolar transistor and the reference potential; and an output current MOS transistor connected to mirror a current in said second current flow path.
Claim 2
Dependent Claim
224 words
A current source for providing a current proportional to absolute temperature, comprising: a first current mirror having first and second current flow paths, and including first and second bipolar transistors; a resistor connected between the bases of said first and second bipolar transistors; a second current mirror having current flow paths connected in series with the respective first and second current flow paths of said first current mirror, and including first and second MOS transistors; third and fourth bipolar transistors connected respectively in said first and second current flow paths; a startup current source connected between a reference potential and the gates of said first and second MOS transistors; third, fourth and fifth MOS transistors having their source/drain paths connected in series between a supply voltage and the reference potential, said third MOS transistor having its gate connected to the gates of said first and second MOS transistors, the fourth MOS transistor having its gate connected to the base of said first bipolar transistor, and the fifth MOS transistor having its gate connected to a node in the second current flow path between the second and fourth bipolar transistors and having its source/drain path connected between the base of said first bipolar transistor and the reference potential; and an output current MOS transistor connected to mirror a current in said second current flow path.
Claim 3
Dependent Claim
13 words
The current source of claim 1 wherein said bipolar transistors are NPN transistors
Claim 4
Dependent Claim
24 words
The current source of claim 2 wherein said bipolar transistor has emitter that is substantially larger than the emitter of said second bipolar transistor.
Claim 5
Dependent Claim
17 words
The current source of claim 2 wherein said first, second, and third MOS transistors are PMOS devices.
Claim 6
Dependent Claim
16 words
The current source of claim 2 wherein said fourth and fifth MOS transistors are NMOS devices.
Claim 7
Dependent Claim
16 words
The current source of claim 5 wherein said output current MOS transistor is an NMOS device.
Claim 8
Dependent Claim
41 words
The current source of claim 1, further comprising an additional output MOS transistor having its source/drain path connected between an output terminal and the reference potential, said additional output MOS transistor connected to mirror a current in said fifth MOS transistor.
Claim 9
Dependent Claim
30 words
The current source of claim 1 wherein the current conducted by said fifth MOS transistor is about twice as large as the current conducted by said output current MOS transistor.
Claim 10
Dependent Claim
102 words
The current source of claim 1, further comprising: a base current compensation circuit comprising: a sixth MOS transistor and a fifth bipolar transistor connected in series between the supply voltage and the reference potential; a seventh MOS transistor connected between the supply voltage and the base of the second bipolar transistor; and an eighth MOS transistor connected between the supply voltage and a base of the fifth bipolar transistor, said sixth MOS transistor having a gate connected to the gate of said third MOS transistor, and said seventh and eighth MOS transistors each having a gate connected to the fifth bipolar transistor.
Claim 11
Dependent Claim
13 words
The current source of claim 9 wherein said bipolar transistors are NPN transistors.
Claim 12
Dependent Claim
43 words
The current source of claim 10 wherein said first bipolar transistor has an emitter that is about twice as large as an emitter of said second bipolar transistor and said first MOS transistor is about twice as large as said second MOS transistor.
Claim 13
Dependent Claim
18 words
The current source of claim 9 wherein said first, second, third, and sixth MOS transistors are PMOS devices.
Claim 14
Dependent Claim
18 words
The current source of claim 9 wherein said fourth, fifth, seventh, and eighth MOS transistors are NMOS devices.
Claim 15
Dependent Claim
41 words
The current source of claim 9, further comprising an additional output MOS transistor having its source/drain path connected between an output terminal and the reference potential, said additional output MOS transistor connected to mirror a current in said fifth MOS transistor.
Claim 16
Dependent Claim
30 words
The current source of claim 9 wherein the current conducted by said fifth MOS transistor is about twice as large as the current conducted by said output current MOS transistor.