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US5334929A Expired / Lapsed US ⏱️ 0.0 years remaining

Circuit for providing a current proportional to absolute temperature

Assignee: Intersil Corp
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Filing: 1992-08-26
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Granted: 1994-08-02
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Expires: 2012-08-26
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Abstract

Abstract An integrated circuit for providing a current proportional to absolute temperature comprises circuitry for providing a first current exhibiting substantially zero temperature coefficient; circuitry for providing a second current exhibiting a negative temperature coefficient; and circuitry for summing the first and second currents for providing a third current proportional to absolute temperature.

Inventors

  • 👤 Otto H. Schade, Jr.

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-03 00:47
CPC Classifications
G; G05; G05F; G05F3/00; G05F3/02; G05F3/08; G05F3/10; G05F3/16; G05F3/20; G05F3/22; G05F3/222; Y; Y10; Y10S; Y10S323/00; Y10S323/907

Claims Analysis

Total Claims: 19
Claim 1
Independent Claim 100 words
An integrated circuit for providing a current proportional to absolute temperature, comprising: current mirror means for producing a reference current; a first circuit means coupled between said current mirror means and a summing node for providing thereto a first current exhibiting substantially zero temperature coefficient; second circuit means coupled between said current mirror means and said summing node for providing thereto a second current exhibiting a negative temperature coefficient; and output means coupled to said summing node for summing said first and second currents for providing and carrying a third current through said output means exhibiting a positive temperature coefficient.
Claim 2
Dependent Claim 100 words
An integrated circuit for providing a current proportional to absolute temperature, comprising: current mirror means for producing a reference current; a first circuit means coupled between said current mirror means and a summing node for providing thereto a first current exhibiting substantially zero temperature coefficient; second circuit means coupled between said current mirror means and said summing node for providing thereto a second current exhibiting a negative temperature coefficient; and output means coupled to said summing node for summing said first and second currents for providing and carrying a third current through said output means exhibiting a positive temperature coefficient.
Claim 3
Dependent Claim 17 words
An integrated circuit in accordance with claim 1, wherein said third current is proportional to absolute temperature.
Claim 4
Dependent Claim 56 words
An integrated circuit in accordance with claim 2, wherein said current mirror means includes first and second current mirror amplifiers (CMAs) interconnected in a feedback loop and exhibiting a current dependent mirroring ratio, said ratio being greater for smaller currents; and wherein one of said CMAs includes field-effect transistors and the other one includes bipolar transistors.
Claim 5
Dependent Claim 47 words
An integrated circuit in accordance with claim 3, wherein said second circuit means comprises a resistor exhibiting a positive temperature coefficient of resistance and means for providing a voltage exhibiting a negative temperature coefficient and for applying said voltage exhibiting a negative temperature coefficient across said resistor.
Claim 6
Dependent Claim 20 words
An integrated circuit in accordance with claim 1, wherein said first current is of greater magnitude than said second current.
Claim 7
Dependent Claim 111 words
The integrated circuit as claimed in claim 1, including first and second power supply rails; and wherein said current mirror means includes first and second current mirror amplifiers (CMAs) of complimentary conductivity, each CMA having a reference terminal, a first input terminal and a second output terminal; and wherein the first CMA is coupled at its reference terminal to said first rail, at its input terminal to a first node and at its output terminal to a second node; and wherein said second CMA is coupled at its reference terminal to said second rail, at its input terminal to said first node and at its output terminal to said second node.
Claim 8
Dependent Claim 113 words
The integrated circuit as claimed in claim 6, wherein said first circuit means includes a first transistor having a control electrode and a main conduction path, the control electrode of said first transistor being coupled to said first node and its main conductor path being coupled between said summing node and said second rail; wherein said second circuit means includes a second transistor having a control electrode and a main conduction path, the control electrode of said second transistor being coupled to said second node; and said second circuit means including a resistor connected in series with the main conduction path of said second transistor between said first rail and said summoning node.
Claim 9
Dependent Claim 43 words
The circuit as claimed in claim 7, wherein said first transistor is a field-effect transistor and wherein said second transistor is a bipolar transistor; and wherein said series connected resistor is connected between the emitter of said second transistor and said first rail.
Claim 10
Dependent Claim 196 words
An integrated circuit for providing a current proportional to absolute temperature, comprising: a current summing node for providing an output current to a load; a transistor having emitter, base, and collector electrodes, said collector electrode being connected to said summing node for providing a first current thereat; a resistor, exhibiting a positive temperature coefficient of resistance, having a first end connected to said emitter electrode and having a second end; current mirror means for producing a reference current and also having a node at which is produced a voltage exhibiting a negative temperature coefficient; means coupled to said node for applying between said second end of said resistor and said base electrode said voltage exhibiting a negative temperature coefficient for causing said first current to exhibit a negative temperature coefficient; and circuit means, coupled to said current mirror means, having an output connected to said summing node for providing thereat a second current, responsive to said reference current, of opposite polarity sense to, and of magnitude greater than, said first current, said second current exhibiting a small temperature coefficient in comparison with said negative temperature coefficient such that said output current exhibits a positive temperature coefficient.
Claim 11
Dependent Claim 196 words
An integrated circuit for providing a current proportional to absolute temperature, comprising: a current summing node for providing an output current to a load; a transistor having emitter, base, and collector electrodes, said collector electrode being connected to said summing node for providing a first current thereat; a resistor, exhibiting a positive temperature coefficient of resistance, having a first end connected to said emitter electrode and having a second end; current mirror means for producing a reference current and also having a node at which is produced a voltage exhibiting a negative temperature coefficient; means coupled to said node for applying between said second end of said resistor and said base electrode said voltage exhibiting a negative temperature coefficient for causing said first current to exhibit a negative temperature coefficient; and circuit means, coupled to said current mirror means, having an output connected to said summing node for providing thereat a second current, responsive to said reference current, of opposite polarity sense to, and of magnitude greater than, said first current, said second current exhibiting a small temperature coefficient in comparison with said negative temperature coefficient such that said output current exhibits a positive temperature coefficient.
Claim 12
Dependent Claim 29 words
An integrated circuit in accordance with claim 9, wherein said output current is proportional to absolute temperature; and wherein said current mirror means includes bipolar transistors and field-effect transistors.
Claim 13
Dependent Claim 32 words
An integrated circuit in accordance with claim 10, wherein said second current exhibits substantially no temperature coefficient; and wherein the bipolar transistors are of opposite conductivity type to the field effect transistors.
Claim 14
Dependent Claim 24 words
An integrated circuit in accordance with claim 9, wherein said circuit means includes an output transistor of opposite conductivity type to said first-named transistor.
Claim 15
Dependent Claim 192 words
An integrated circuit for providing a current proportional to absolute temperature, comprising: a feedback loop of first and second current mirror amplifiers of opposite polarity types being interconnected with an output of each current mirror amplifier being connected to the input of the other so as to exhibit a loop gain, at least one of said current mirrors including resistive means for providing resistive emitter degeneration in an output transistor thereof so as to exhibit a current gain diminishing with current increase, said loop gain exceeding unity at a first, smaller current and dropping to unity at a second, greater current for stable operation thereat such that said second current is substantially independent of temperature; mirroring means coupled between one of said current mirror amplifiers and a summing node for providing thereto a third current proportional to said second current; means coupled between one of said current mirror amplifiers and said summing node for providing thereto a fourth current exhibiting a negative temperature coefficient; and summing output means coupled to said summing node for providing an output current through said output means equal to the difference between said third and fourth currents.
Claim 16
Dependent Claim 192 words
An integrated circuit for providing a current proportional to absolute temperature, comprising: a feedback loop of first and second current mirror amplifiers of opposite polarity types being interconnected with an output of each current mirror amplifier being connected to the input of the other so as to exhibit a loop gain, at least one of said current mirrors including resistive means for providing resistive emitter degeneration in an output transistor thereof so as to exhibit a current gain diminishing with current increase, said loop gain exceeding unity at a first, smaller current and dropping to unity at a second, greater current for stable operation thereat such that said second current is substantially independent of temperature; mirroring means coupled between one of said current mirror amplifiers and a summing node for providing thereto a third current proportional to said second current; means coupled between one of said current mirror amplifiers and said summing node for providing thereto a fourth current exhibiting a negative temperature coefficient; and summing output means coupled to said summing node for providing an output current through said output means equal to the difference between said third and fourth currents.
Claim 17
Dependent Claim 89 words
An integrated circuit in accordance with claim 13, wherein said feedback loop includes a node at voltage of 2 Vbe with respect to a supply rail and including a transistor having emitter, base, and collector electrodes and being of a conductivity type for providing a collector current of opposite polarity sense to said third current; a resistor of positive temperature coefficient of resistance connected between said supply rail and said emitter electrode; said base electrode being connected to said node and said collector being connected to said summing means.
Claim 18
Dependent Claim 28 words
An integrated circuit in accordance with claim 13, wherein said third current is greater than said fourth current and wherein said output current is proportional to absolute temperature.
Claim 19
Dependent Claim 19 words
An integrated circuit in accordance with claim 13, wherein said resistive means exhibits a positive temperature coefficient of resistance.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1997-08-01 1998-01-31 1998-08-02 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2001-08-01 2002-01-31 2002-08-02 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2005-08-01 2006-01-31 2006-08-02 $7700.00 Window Closed / Lapsed

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