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US5446371A
Expired / Lapsed
US
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Precision analog-to-digital converter with low-resolution and high-resolution conversion paths
Assignee: Fluke Corp
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Filing: 1994-05-12
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Granted: 1995-08-29
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Expires: 2014-05-12
Abstract
Abstract An analog-to-digital converter utilizes low-resolution and high-resolution conversion paths for precision voltage measurements. A first conversion made using a comparatively low resolution ADC is used to predict the reference voltage to one input of a null detector that receives the input voltage on another input, and effectively magnifies the voltage difference between its inputs. In a preferred embodiment, the duty cycle of a pulse-width modulator is adjusted to precisely adjust the reference voltage to provide a nulled (or near null) reading from the null detector. A low resolution ADC then converts the voltage from the null detector, which when added to the reference voltage, yields a final reading with 18-bit to 22-bit accuracy. The preferred embodiment is implemented to read the output from a pressure transducer and employs a binary search technique to rapidly adjust the duty cycle of the pulse-width modulator. The system utilizes a single ADC which is multiplexed between the low-resolution, high-speed reading and high-resolution, low-speed reading of the fully settled output of the null detector.
Inventors
- 👤 Larry E. Eccleston
- 👤 David E. Bezold
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-08 19:28
CPC Classifications
G; G01; G01R; G01R19/00; H; H03; H03M; H03M1/00; H03M1/12; H03M1/14; H03M1/145; G01R19/25; H03M1/66; H03M1/82; H03M1/822
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
220 words
A high-resolution voltage measurement circuit, comprising: an input path for receiving an input voltage to be measured; analog-to-digital conversion means coupled to said input path for converting said input voltage to a first converted voltage; a processor circuit coupled to an output of said analog-to-digital conversion means for receiving said first converted voltage; a programmable DC voltage generator coupled to said processor circuit to provide a DC reference voltage in response to commands from said processor circuit; and a null detector having a first input coupled to said input path and a second input coupled to an output of said programmable DC voltage generator, said null detector further having an output coupled to an input of said analog-to-digital conversion means, wherein said processor circuit monitors an output of said analog-to-digital conversion means while commanding said programmable DC voltage generator to adjust said DC reference voltage until the output of said null detector is within a predetermined range amplifying the difference between said input voltage and said DC reference voltage, said analog-to-digital conversion means further converting said difference between said input voltage and said DC reference voltage to a second converted voltage, and said processor circuit further adding said second converted voltage to a voltage equal to said DC reference voltage to provide a final voltage representative of said input voltage.
Claim 2
Dependent Claim
220 words
A high-resolution voltage measurement circuit, comprising: an input path for receiving an input voltage to be measured; analog-to-digital conversion means coupled to said input path for converting said input voltage to a first converted voltage; a processor circuit coupled to an output of said analog-to-digital conversion means for receiving said first converted voltage; a programmable DC voltage generator coupled to said processor circuit to provide a DC reference voltage in response to commands from said processor circuit; and a null detector having a first input coupled to said input path and a second input coupled to an output of said programmable DC voltage generator, said null detector further having an output coupled to an input of said analog-to-digital conversion means, wherein said processor circuit monitors an output of said analog-to-digital conversion means while commanding said programmable DC voltage generator to adjust said DC reference voltage until the output of said null detector is within a predetermined range amplifying the difference between said input voltage and said DC reference voltage, said analog-to-digital conversion means further converting said difference between said input voltage and said DC reference voltage to a second converted voltage, and said processor circuit further adding said second converted voltage to a voltage equal to said DC reference voltage to provide a final voltage representative of said input voltage.
Claim 3
Dependent Claim
29 words
A voltage measurement circuit in accordance with claim 1 wherein said first converted voltage is used by said processor circuit to predict a value for said DC reference voltage.
Claim 4
Dependent Claim
26 words
A voltage measurement circuit in accordance with claim 1 wherein said processor circuit performs a binary search to establish a value for said DC reference voltage.
Claim 5
Dependent Claim
31 words
A voltage measurement circuit in accordance with claim 1 wherein said analog-to-digital conversion means is a single analog-to-digital converter multiplexed between said input path and said output of said null detector.
Claim 6
Dependent Claim
24 words
A voltage measurement circuit in accordance with claim 1 wherein said first converted voltage and said final voltage are provided to a display device.
Claim 7
Dependent Claim
49 words
A voltage measurement circuit in accordance with claim 1 wherein said programmable DC voltage generator is a pulse width modulation circuit which produces said DC reference voltage in response to a square-wave voltage signal, and further wherein said processor circuit varies the duty cycle of said square-wave voltage signal.
Claim 8
Dependent Claim
21 words
A voltage measurement circuit in accordance with claim 1 wherein said null detector is an operational amplifier having a predetermined gain.
Claim 9
Dependent Claim
37 words
A voltage measurement circuit in accordance with claim 1 wherein said analog-to-digital conversion means comprises a first analog-to-digital converter coupled to said input path and a second analog-to-digital converter coupled to the output of said null detector.
References Cited (Backward Citations)
US4868910A
Cited
US5155431A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1998-08-28 | 1999-02-27 | 1999-08-29 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2002-08-28 | 2003-02-27 | 2003-08-29 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2006-08-28 | 2007-02-27 | 2007-08-29 | $7700.00 | Window Closed / Lapsed |