Wideband linear and logarithmic signal conversion circuits

Claim 2

A cascode mirror circuit comprising: first and second transistors; a first reference current source having a connection at one side to a supply voltage and at another side to said first transistor; said first and second transistors having conduction paths connected in series between the first reference current source and a first reference voltage, said first transistor having a current control element connected to a second reference voltage; a current compensating transistor having a conduction path connected between the supply voltage and a current control element of the second transistor, and having a current control element connected at a node between the first reference current source and said first transistor; an input signal receiving node being provided between said first and second transistors; and an output circuit arranged to provide an output signal proportional to a current conducted by the conduction path of said second transistor.

Claim 3

The cascode mirror circuit of claim 1, further comprising a biasing potential between the current control element of said second transistor and said current compensating transistor to raise a voltage at the connection between the first reference current source and said first transistor.

Claim 4

The cascode mirror circuit of claim 2 wherein said biasing potential is provided by a potential source between the current compensating transistor and the current control element of said second transistor.

Claim 5

The cascode mirror circuit of claim 1 wherein said input signal receiving node is connected to receive an input voltage, and said output circuit is a current mirror circuit connected to copy a current flowing in said second transistor.

Claim 6

The cascode mirror circuit of claim 4 further comprising an input resistor to connect the input voltage to said input signal receiving node.

Claim 7

The cascode mirror circuit of claim 5 wherein said output circuit comprises an output fourth transistor having a current control element connected to a current control element of said second transistor.

Claim 8

The cascode mirror circuit of claim 5 further comprising a cascode fifth transistor connected between said first transistor and the first reference current source, said fifth transistor having a current control element connected to a third reference voltage.

Claim 9

The cascode mirror circuit of claim 7 wherein said second and third reference voltages are equal.

Claim 10

The cascode mirror circuit of claim 7 wherein said second and third reference voltages are from the same source.

Claim 11

The cascode mirror circuit of claim 10 wherein said first, second, current compensating, and fourth transistors are bipolar transistors.

Claim 12

The cascode mirror circuit of claim 10 wherein said first, second, current compensating, and fourth transistors are NPN transistors.

Claim 13

The cascode mirror circuit of claim 5 wherein said first, second, current compensating, and fourth transistors are MOS transistors.

Claim 14

The cascode mirror circuit of claim 1 further comprising an impedance connected between said first and second transistors, wherein said input signal receiving node is located between said impedance and said first transistor and is connected to receive an input current, and a node between said second transistor and said impedance is connected to provide a voltage output signal.

Claim 15

The cascode mirror circuit of claim 13 wherein said first, second, current compensating, and fourth transistors are bipolar transistors.

Claim 16

The cascode mirror circuit of claim 14 wherein said first, second, current compensating, and fourth transistors are NPN transistors.

Claim 17

The cascode mirror circuit of claim 13 wherein said first, second, current compensating, and fourth transistors are MOS transistors.

Claim 18

A cascode mirror circuit, comprising: first, second and third transistors; a first reference current source having a connection at one side to a supply voltage and at another side to said first transistor; said first and second transistors being connected in series between the first reference current source and a first reference voltage, said first transistor having a current control element connected to a second reference voltage; said third transistor being connected between the supply voltage and a current control element of the second transistor, and having a current control element connected between the first reference current source and said first transistor; an input signal receiving node being provided between said first and second transistors; an output circuit arranged to provide an output signal proportional to a current flowing in said second transistor; a first bias transistor connected between said third transistor and the current control element of said second transistor, said first bias transistor having a current control element connected to a third reference voltage; and a second bias transistor connected between the current control element of said second transistor and said first reference voltage, and having a current control element connected to the current control element of said second transistor, said first and second bias transistors for raising a voltage at the connection between the first reference current source and said first transistor.

Claim 19

A cascode mirror circuit, comprising: first, second and third transistors; a first reference current source having a connection at one side to a supply voltage and at another side to said first transistor; said first and second transistors being connected in series between the first reference current source and a first reference voltage, said first transistor having a current control element connected to a second reference voltage; said third transistor being connected between the supply voltage and a current control element of the second transistor, and having a current control element connected between the first reference current source and said first transistor; an input signal receiving node being provided between said first and second transistors; an output circuit arranged to provide an output signal proportional to a current flowing in said second transistor; a first bias transistor connected between said third transistor and the current control element of said second transistor, said first bias transistor having a current control element connected to a third reference voltage; and a second bias transistor connected between the current control element of said second transistor and said first reference voltage, and having a current control element connected to the current control element of said second transistor, said first and second bias transistors for raising a voltage at the connection between the first reference current source and said first transistor.

Claim 20

A voltage-to-current converter, comprising: a first reference current source connected at one side to a supply voltage; a first transistor having a conduction path connected on a first side to said first reference current source, and having a current control element connected to a second reference voltage; a second transistor having a conduction path connected between a first reference voltage and a second side of the conduction path of said first transistor, and having a current control electrode; a third transistor having a conduction path connected between the supply voltage and the current control element of the second transistor, and having a current control element connected to the first side of the conduction path of said first transistor; an input resistor connected to apply an input voltage to an input signal receiving node between said first and second transistors; and an output current mirror connected to provide an output current signal proportional to the current in said second transistor.

Claim 21

A voltage-to-current converter, comprising: a first reference current source connected at one side to a supply voltage; a first transistor having a conduction path connected on a first side to said first reference current source, and having a current control element connected to a second reference voltage; a second transistor having a conduction path connected between a first reference voltage and a second side of the conduction path of said first transistor, and having a current control electrode; a third transistor having a conduction path connected between the supply voltage and the current control element of the second transistor, and having a current control element connected to the first side of the conduction path of said first transistor; an input resistor connected to apply an input voltage to an input signal receiving node between said first and second transistors; and an output current mirror connected to provide an output current signal proportional to the current in said second transistor.

Claim 22

The voltage-to-current converter of claim 18 further comprising a biasing potential between the current control element of said second transistor and said third transistor to raise the voltage at the connection between the first reference current source and said first transistor.

Claim 23

The voltage-to-current converter of claim 19 wherein said biasing potential is provided by a potential source between the third transistor and the current control element of said second transistor.

Claim 24

The voltage-to-current converter of claim 18 wherein said output current mirror comprises an output fifth transistor having a current control element connected to a current control element of said second transistor.

Claim 25

The voltage-to-current converter of claim 18 further comprising a second reference current source connected between the supply voltage and the input signal receiving node to provide an extended input voltage range of operation of said voltage-to-current converter.

Claim 26

The voltage-to-current converter of claim 18 further comprising a fifth transistor connected between said first transistor and the first reference current source, said fifth transistor having a current control element connected to a third reference voltage.

Claim 27

The voltage-to-current converter of claim 23 wherein said second and third reference voltages are equal.

Claim 28

The voltage-to-current converter of claim 21 wherein said second and third reference voltages are from the same source.

Claim 29

The voltage-to-current converter of claim 21 wherein said first, second, third, and fourth transistors are bipolar transistors.

Claim 30

The voltage-to-current converter of claim 21 wherein said first, second, third, and fourth transistors are NPN transistors.

Claim 31

The voltage-to-current converter of claim 23 wherein said first, second, third, and fourth transistors are MOS transistors.

Claim 32

A voltage-to-current converter, comprising: first, second, and third transistors; a first reference current source connected at one side to a supply voltage; said first and second transistors being connected in series, said first transistor being connected to said first reference current source and said second transistor connected to a first reference voltage, said first transistor having a current control element connected to a second reference voltage; said third transistor being connected between the supply voltage and a current control element of the second transistor, and having a current control element connected between the first reference current source and said first transistor; an input resistor connected to apply an input voltage to an input signal receiving node between said first and second transistors; an output current mirror connected to provide an output current signal proportional to the current in said second transistor; a first bias transistor connected between said third transistor and the current control element of said second transistor, said first bias transistor having a current control element connected to a third reference voltage; and a second bias transistor connected between the current control element of said second transistor and said first reference voltage, and having a current control element connected to the current control element of said second transistor, said first and second bias transistors for raising the voltage at the connection between the first reference current source and said first transistor.

Claim 33

A voltage-to-current converter, comprising: first, second, and third transistors; a first reference current source connected at one side to a supply voltage; said first and second transistors being connected in series, said first transistor being connected to said first reference current source and said second transistor connected to a first reference voltage, said first transistor having a current control element connected to a second reference voltage; said third transistor being connected between the supply voltage and a current control element of the second transistor, and having a current control element connected between the first reference current source and said first transistor; an input resistor connected to apply an input voltage to an input signal receiving node between said first and second transistors; an output current mirror connected to provide an output current signal proportional to the current in said second transistor; a first bias transistor connected between said third transistor and the current control element of said second transistor, said first bias transistor having a current control element connected to a third reference voltage; and a second bias transistor connected between the current control element of said second transistor and said first reference voltage, and having a current control element connected to the current control element of said second transistor, said first and second bias transistors for raising the voltage at the connection between the first reference current source and said first transistor.

Claim 34

A current-to-voltage converter for connection between a supply voltage and a first reference voltage, comprising: a first transistor, having a conduction path, and having a current control element connected to a second reference voltage; a first reference current source connected at one side to a supply voltage and at another side to the conduction path of the first transistor; an impedance, connected on a first side to the conduction path of said first transistor; a second transistor having a conduction path connected in series between a second side of said impedance and the first reference voltage, and having a current control electrode; and a third transistor having a conduction path connected between the supply voltage and the current control element of the second transistor, said third transistor having a current control element connected at a node between the first reference current source and said first transistor; wherein, in response to an input current applied to the first side of said impedance, the current-to-voltage converter presents an output voltage at the second side of said impedance.

Claim 35

A current-to-voltage converter for connection between a supply voltage and a first reference voltage, comprising: a first transistor, having a conduction path, and having a current control element connected to a second reference voltage; a first reference current source connected at one side to a supply voltage and at another side to the conduction path of the first transistor; an impedance, connected on a first side to the conduction path of said first transistor; a second transistor having a conduction path connected in series between a second side of said impedance and the first reference voltage, and having a current control electrode; and a third transistor having a conduction path connected between the supply voltage and the current control element of the second transistor, said third transistor having a current control element connected at a node between the first reference current source and said first transistor; wherein, in response to an input current applied to the first side of said impedance, the current-to-voltage converter presents an output voltage at the second side of said impedance.

Claim 36

The current-to-voltage converter of claim 30 further comprising a biasing potential between the current control element of said second transistor and said third transistor to raise a voltage at the connection between the first reference current source and said first transistor.

Claim 37

The current-to-voltage converter of claim 31 wherein said biasing potential is provided by a potential source between the current control element of said third transistor and the current control element of said second transistor.

Claim 38

A current-to-voltage converter, comprising: first, second and third transistors, said first transistor having a current control element connected to a second reference voltage; a first reference current source connected at one side to a supply voltage; and an impedance, said first transistor being connected in series between one end of said impedance and the first reference current source, said second transistor being connected in series between another side of said impedance and the first reference voltage; said third transistor being connected between the supply voltage and a current control element of the second transistor, and having a current control element connected between the first reference current source and said first transistor; a current input signal receiving node between said second reference supply voltage and a node between said first transistor and said one side of said impedance; an output voltage node between said second transistor and said another side of said impedance; a first bias transistor connected between said third transistor and the current control element of said second transistor, said first bias transistor having a current control element connected to a third reference voltage; and a second bias transistor connected between the current control element of said second transistor and said first reference voltage, and having a current control element connected to the current control element of said second transistor, said first and second bias transistors for raising a voltage at the connection between the first reference current source and said first transistor.

Claim 39

A current-to-voltage converter, comprising: first, second and third transistors, said first transistor having a current control element connected to a second reference voltage; a first reference current source connected at one side to a supply voltage; and an impedance, said first transistor being connected in series between one end of said impedance and the first reference current source, said second transistor being connected in series between another side of said impedance and the first reference voltage; said third transistor being connected between the supply voltage and a current control element of the second transistor, and having a current control element connected between the first reference current source and said first transistor; a current input signal receiving node between said second reference supply voltage and a node between said first transistor and said one side of said impedance; an output voltage node between said second transistor and said another side of said impedance; a first bias transistor connected between said third transistor and the current control element of said second transistor, said first bias transistor having a current control element connected to a third reference voltage; and a second bias transistor connected between the current control element of said second transistor and said first reference voltage, and having a current control element connected to the current control element of said second transistor, said first and second bias transistors for raising a voltage at the connection between the first reference current source and said first transistor.

Claim 40

The current-to-voltage converter of claim 33 further comprising a fourth transistor connected between said first transistor and the first reference current source, said fourth transistor having a current control element connected to a fourth reference voltage.

Claim 41

The current-to-voltage converter of claim 34 wherein said second and third reference potentials are equal.

Claim 42

The current-to-voltage converter of claim 34 wherein said second and third reference potentials are from the same source.

Claim 43

The current-to-voltage converter of claim 36 wherein said first, second, third, and fourth transistors are bipolar transistors.

Claim 44

The current-to-voltage converter of claim 37 wherein said first, second, third, and fourth transistors are NPN transistors.

Claim 45

The current-to-voltage converter of claim 36 wherein said first, second, third, and fourth transistors are MOS transistors.

Claim 46

A nonlinear cascode mirror circuit, comprising: first and second transistors, having conduction paths connected in series, and having current control elements, wherein the conduction path of said first transistor receives an input current from a supply voltage at an input node, wherein the conduction path of the second transistor is connected to a first reference voltage, and wherein the current control element of said first transistor is connected to a second reference voltage; a third transistor having a conduction path connected between the supply voltage and the current control element of the second transistor, and having a current control element connected to the input node; a resistor connected between a third reference voltage and a common node at which the conduction paths of said first and second transistors are connected to one another; and an output circuit arranged to provide an output signal nonlinearly proportional to the input current.

Claim 47

A nonlinear cascode mirror circuit, comprising: first and second transistors, having conduction paths connected in series, and having current control elements, wherein the conduction path of said first transistor receives an input current from a supply voltage at an input node, wherein the conduction path of the second transistor is connected to a first reference voltage, and wherein the current control element of said first transistor is connected to a second reference voltage; a third transistor having a conduction path connected between the supply voltage and the current control element of the second transistor, and having a current control element connected to the input node; a resistor connected between a third reference voltage and a common node at which the conduction paths of said first and second transistors are connected to one another; and an output circuit arranged to provide an output signal nonlinearly proportional to the input current.

Claim 48

The nonlinear cascode mirror circuit of claim 40 wherein said output signal is logarithmically proportional to the input current signal.

Claim 49

The nonlinear cascode mirror circuit of claim 41 further comprising a biasing potential between the current control element of said second and said third transistor to raise the voltage at the connection between the current source and said first transistor.

Claim 50

The nonlinear cascode mirror circuit of claim 42 wherein said biasing potential is provided by a potential source between the third transistor and the current control element of said second transistor.

Claim 51

The nonlinear cascode mirror circuit of claim 40 wherein said output circuit is a mirror circuit connected to copy a current flowing in said second transistor.

Claim 52

The nonlinear cascode mirror circuit of claim 44 wherein said output circuit comprises an output fourth transistor having a current control element connected to a current control element of said second transistor.

Claim 53

The nonlinear cascode mirror circuit of claim 45 further comprising a fifth transistor connected between said first transistor and the input node, said additional fifth having a current control element connected to a third reference voltage.

Claim 54

The nonlinear cascode mirror circuit of claim 46 wherein said second and third reference voltages are equal.

Claim 55

The nonlinear cascode mirror circuit of claim 46 wherein said second and third reference voltages are from the same source.

Claim 56

The nonlinear cascode mirror circuit of claim 47 wherein said first, second, third, and fourth transistors are bipolar transistors.

Claim 57

The nonlinear cascode mirror circuit of claim 49 wherein said first, second, third, and fourth transistors are NPN transistors.

Claim 58

The nonlinear cascode mirror circuit of claim 47 wherein said first, second, third, and fourth transistors are MOS transistors.

Claim 59

A nonlinear cascode mirror circuit, comprising: first, second, and third transistors; said first and second transistors being connected in series, said first transistor being connected to an input node and said second transistor being connected to a first reference voltage, wherein an input current can be applied between a supply voltage and said input node, said first transistor having a current control element connected to a second reference voltage; said third transistor being connected between the supply voltage and a current control element of the second transistor, and having a current control element connected between the input node and said first transistor; a resistor connected between a third reference voltage and a node between said first and second transistors; an output circuit arranged to provide an output signal nonlinearly proportional to the input current; a first bias transistor connected between said third transistor and the current control element of said second transistor, said first bias transistor having a current control element connected to a second reference voltage; and a second bias transistor connected between the current control element of said second transistor and said first reference voltage, and having a current control element connected to the current control element of said second transistor, said first and second bias transistors for raising the voltage at the connection between the current source and said first transistor.

Claim 60

A nonlinear cascode mirror circuit, comprising: first, second, and third transistors; said first and second transistors being connected in series, said first transistor being connected to an input node and said second transistor being connected to a first reference voltage, wherein an input current can be applied between a supply voltage and said input node, said first transistor having a current control element connected to a second reference voltage; said third transistor being connected between the supply voltage and a current control element of the second transistor, and having a current control element connected between the input node and said first transistor; a resistor connected between a third reference voltage and a node between said first and second transistors; an output circuit arranged to provide an output signal nonlinearly proportional to the input current; a first bias transistor connected between said third transistor and the current control element of said second transistor, said first bias transistor having a current control element connected to a second reference voltage; and a second bias transistor connected between the current control element of said second transistor and said first reference voltage, and having a current control element connected to the current control element of said second transistor, said first and second bias transistors for raising the voltage at the connection between the current source and said first transistor.

Claim 61

A nonlinear cascode mirror circuit, comprising: first, second and third transistors; a first source of reference current connected at one side to said supply voltage; said first and second transistors having conduction paths connected in series between another side of said first source of reference current and a first reference voltage, said first transistor having a current control element connected to a second reference voltage; said third transistor having a conduction path connected between the supply voltage and a current control element of the second transistor, and having a current control element; a current input node located in the series connection between the conduction paths of said first and second transistors, for receiving an input current from said supply voltage, and connected to the current control element of said third transistor; and an output circuit arranged to provide an output signal nonlinearly proportional to the input current.

Claim 62

A nonlinear cascode mirror circuit, comprising: first, second and third transistors; a first source of reference current connected at one side to said supply voltage; said first and second transistors having conduction paths connected in series between another side of said first source of reference current and a first reference voltage, said first transistor having a current control element connected to a second reference voltage; said third transistor having a conduction path connected between the supply voltage and a current control element of the second transistor, and having a current control element; a current input node located in the series connection between the conduction paths of said first and second transistors, for receiving an input current from said supply voltage, and connected to the current control element of said third transistor; and an output circuit arranged to provide an output signal nonlinearly proportional to the input current.

Claim 63

The nonlinear cascode mirror circuit of claim 53 wherein said output signal is exponentially proportional to the input current.

Claim 64

The nonlinear cascode mirror circuit of claim 53 further comprising a biasing potential between the current control element of said second and said third transistor to raise a voltage at the connection between the first source of reference current and said first transistor.

Claim 65

The nonlinear cascode mirror circuit of claim 55 wherein said biasing potential is provided by a potential source between the third transistor and the current control element of said second transistor.

Claim 66

The nonlinear cascode mirror circuit of claim 53 further comprising a fourth transistor connected between said first transistor and the first source of reference current, said fourth transistor having a current control element connected to a third reference voltage.

Claim 67

The nonlinear cascode mirror circuit of claim 57 wherein said second and third reference voltages are equal.

Claim 68

The nonlinear cascode mirror circuit of claim 57 wherein said second and third reference voltages are from the same source.

Claim 69

The nonlinear cascode mirror circuit of claim 52 wherein said output circuit comprises a resistor to develop an output voltage proportional to the current in said second transistor.

Claim 70

The nonlinear cascode mirror circuit of claim 60 wherein said output circuit further comprises an output fifth transistor having a current control element connected to a current control element of said first transistor.

Claim 71

The nonlinear cascode mirror circuit of claim 61 wherein said first, second, third, and fifth transistors are bipolar transistors.

Claim 72

The nonlinear cascode mirror circuit of claim 62 wherein said first, second, third, and fifth transistors are NPN transistors.

Claim 73

The nonlinear cascode mirror circuit of claim 61 wherein said first, second, third, and fifth transistors are MOS transistors.

Claim 74

A nonlinear cascode mirror circuit comprising: first, second and third transistors; a first source of reference current connected at one side to said supply voltage; said first and second transistors being connected in series between another side of said first source of reference current and a first reference voltage, said first transistor having a current control element connected to a second reference voltage; said third transistor being connected between the supply voltage and a current control element of the second transistor, and having a current control element; a current input node between said first and second transistors, wherein an input current can be applied between said supply voltage and said current input node and wherein the current control element of said third transistor is connected between the current input node and said first transistor; an output circuit arranged to provide an output signal nonlinearly proportional to an input current; a first bias transistor connected between said third transistor and the current control element of said second transistor, said first bias transistor having a current control element connected to a second reference voltage; and a second bias transistor connected between the current control element of said second transistor and said first reference voltage, and having a current control element connected to the current control element of said second transistor, said first and second bias transistors for raising a voltage at the connection between the first source of reference current and said first transistor.

Claim 75

A nonlinear cascode mirror circuit comprising: first, second and third transistors; a first source of reference current connected at one side to said supply voltage; said first and second transistors being connected in series between another side of said first source of reference current and a first reference voltage, said first transistor having a current control element connected to a second reference voltage; said third transistor being connected between the supply voltage and a current control element of the second transistor, and having a current control element; a current input node between said first and second transistors, wherein an input current can be applied between said supply voltage and said current input node and wherein the current control element of said third transistor is connected between the current input node and said first transistor; an output circuit arranged to provide an output signal nonlinearly proportional to an input current; a first bias transistor connected between said third transistor and the current control element of said second transistor, said first bias transistor having a current control element connected to a second reference voltage; and a second bias transistor connected between the current control element of said second transistor and said first reference voltage, and having a current control element connected to the current control element of said second transistor, said first and second bias transistors for raising a voltage at the connection between the first source of reference current and said first transistor.