Linear-phase filter having high gain selectivity

Claim 2

A monolithically integrated filter circuit having an input for receiving an analog input signal V in and having an output for producing a filtered analog output signal V out , wherein said filter circuit has a gain, defined by the ratio of V out to V in , having a magnitude and a phase dependent upon frequency f, said filter circuit comprising: a first active circuit coupled between said input and output for providing said magnitude, such that the magnitude as a function of frequency includes a pass band in a first frequency range, a stop band in a second frequency range, and a 3 dB cut-off frequency in a transition region therebetween, said first active circuit causing said magnitude to have a notch, at a notch frequency in the stop band, for improving gain selectivity of the filter circuit in the transition region; and a second active circuit coupled between said input and output for adjusting the phase to reduce non-linearity in the change in phase as a function of frequency in the pass band, without substantially changing the magnitude.

Claim 3

The filter circuit of claim 1 wherein the first and second active circuits are switched capacitor circuits.

Claim 4

The filter circuit of claim 2 wherein the filter circuit includes an input for receiving a clock signal having a clock frequency, said clock frequency controlling the 3 dB cut-off frequency so that the 3 dB cut-off frequency can be varied within a third frequency range.

Claim 5

The filter circuit of claim 3 wherein said filter circuit comprises a plurality of general purpose switched capacitor active filters cascaded in series so that each active filter performs a second-order filtering function.

Claim 6

The filter circuit of claim 4 wherein said general purpose switched capacitor active filters each comprise an operational amplifier, a first integrator and a second integrator cascaded in series.

Claim 7

The filter circuit of claim 5 wherein the first frequency range is below the second frequency range so that said filter circuit passes low frequencies and stops high frequencies.

Claim 8

The filter circuit of claim 5 wherein the first frequency range is above the second frequency range so that said filter circuit passes high frequencies and stops low frequencies.

Claim 9

The filter circuit of claim 1 wherein the first and second active circuits are R-C active circuits.

Claim 10

The filter circuit of claim 8 wherein the first frequency range is below the second frequency range so that said filter circuit passes low frequencies and stops high frequencies.

Claim 11

The filter circuit of claim 8 wherein the first frequency range is above the second frequency range so that said filter circuit passes high frequencies and stops low frequencies.

Claim 12

A monolithically integrated filter circuit having an input for receiving an analog input signal v in and having an output for producing a filtered analog output signal v out , wherein said filter circuit has a gain, defined by the ratio of v out to v in , having a magnitude and a phase dependent upon frequency f, said filter circuit further comprising: first, second, third and fourth switched capacitor circuits cascaded in series, each respective switched capacitor circuit in turn having an operational amplifier, a first integrator and a second integrator cascaded in series so as to provide high pass, band pass and low pass functions at the respective outputs of said operational amplifier, first integrator and second integrator, wherein: three of said four switched capacitor circuits provide said magnitude, such that the magnitude as a function of frequency includes a pass band in a first frequency range, a stop band in a second frequency range and a 3 dB cut-off frequency in a transition region therebetween, said three switched capacitor circuits causing said magnitude to have a notch, at a notch frequency in the stop band, for improving the gain selectivity of the filter circuit in the transition region and said notch being provided by at least one of said three switched capacitor circuits including a plurality of notch-providing resistors; and said remaining one switched capacitor circuit having a plurality of resistors for adjusting the phase, so that the change in phase as a function of frequency is substantially constant in the pass band, without substantially changing the magnitude.

Claim 13

A monolithically integrated filter circuit having an input for receiving an analog input signal v in and having an output for producing a filtered analog output signal v out , wherein said filter circuit has a gain, defined by the ratio of v out to v in , having a magnitude and a phase dependent upon frequency f, said filter circuit further comprising: first, second, third and fourth switched capacitor circuits cascaded in series, each respective switched capacitor circuit in turn having an operational amplifier, a first integrator and a second integrator cascaded in series so as to provide high pass, band pass and low pass functions at the respective outputs of said operational amplifier, first integrator and second integrator, wherein: three of said four switched capacitor circuits provide said magnitude, such that the magnitude as a function of frequency includes a pass band in a first frequency range, a stop band in a second frequency range and a 3 dB cut-off frequency in a transition region therebetween, said three switched capacitor circuits causing said magnitude to have a notch, at a notch frequency in the stop band, for improving the gain selectivity of the filter circuit in the transition region and said notch being provided by at least one of said three switched capacitor circuits including a plurality of notch-providing resistors; and said remaining one switched capacitor circuit having a plurality of resistors for adjusting the phase, so that the change in phase as a function of frequency is substantially constant in the pass band, without substantially changing the magnitude.

Claim 14

The filter circuit of claim 11 wherein the filter circuit includes an input for receiving a clock signal having a clock frequency, said clock frequency controlling the 3 dB cut-off frequency so that the 3 dB cut-off frequency can be varied within a fourth frequency range.

Claim 15

The filter circuit of claim 12 wherein said filter circuit comprises a plurality of general purpose switched capacitor active filters cascaded in series so that each active filter performs a second-order filtering function.

Claim 16

The filter circuit of claim 13 wherein the first frequency range is below the second frequency range so that said filter circuit passes low frequencies and stops high frequencies.

Claim 17

The filter circuit of claim 13 wherein the first frequency range is above the second frequency range so that said filter circuit passes high frequencies and stops low frequencies.

Claim 18

A filter circuit having an input for receiving an analog input signal v in and having an output for producing a filtered analog output signal v out , wherein said filter circuit has a gain, defined by the ratio of v out to V in , having a magnitude and a phase dependent upon frequency f, said filter circuit comprising: a switched capacitor gain circuit coupled between said input and output for providing said magnitude, such that the magnitude as a function of frequency includes a pass band in a first frequency range, a stop band in a second frequency range, and a 3 dB cut-off frequency f c in a transition region therebetween, said gain circuit causing said gain to substantially conform to the following frequency-dependent low pass function: ##EQU9## wherein f n1 , f 01 , Q 1 , f 02 , Q 2 , f 03 , and Q 3 are real constants and s=i·f, where i represents a complex number equal to the square root of negative one; and an input for receiving a clock signal having a clock frequency, said clock frequency controlling the 3 dB cut-off frequency so that the 3 dB cut-off frequency can be varied within a third frequency range; said filter circuit being further characterized in that it comprises a plurality of general purpose switched capacitor active filters cascaded in series, each active filter performing a second order filtering function.

Claim 19

A filter circuit having an input for receiving an analog input signal v in and having an output for producing a filtered analog output signal v out , wherein said filter circuit has a gain, defined by the ratio of v out to V in , having a magnitude and a phase dependent upon frequency f, said filter circuit comprising: a switched capacitor gain circuit coupled between said input and output for providing said magnitude, such that the magnitude as a function of frequency includes a pass band in a first frequency range, a stop band in a second frequency range, and a 3 dB cut-off frequency f c in a transition region therebetween, said gain circuit causing said gain to substantially conform to the following frequency-dependent low pass function: ##EQU9## wherein f n1 , f 01 , Q 1 , f 02 , Q 2 , f 03 , and Q 3 are real constants and s=i·f, where i represents a complex number equal to the square root of negative one; and an input for receiving a clock signal having a clock frequency, said clock frequency controlling the 3 dB cut-off frequency so that the 3 dB cut-off frequency can be varied within a third frequency range; said filter circuit being further characterized in that it comprises a plurality of general purpose switched capacitor active filters cascaded in series, each active filter performing a second order filtering function.

Claim 20

The circuit of claim 16 wherein: f 02 is less than f c ; and f 01 and f 03 are greater than f c .

Claim 21

The circuit of claim 17 wherein: Q 2 is less than one; and Q 1 and Q 3 are greater than one.

Claim 22

The circuit of claim 18 wherein f n1 is greater than f c and less than 4·f c .

Claim 23

The circuit of claim 19 wherein f 01 and f 03 are less than 1.5·f c .

Claim 24

The filter circuit of claim 16 wherein said general purpose switched capacitor active filters each comprise an operational amplifier, a first integrator and a second integrator cascaded in series.

Claim 25

A filter circuit having an input for receiving an analog input signal V in and having an output for producing a filtered analog output signal v out , wherein said filter circuit has a gain, defined by the ratio of v out to V in , having a magnitude and a phase dependent upon frequency f, said filter circuit comprising: a first circuit coupled between said input and output for providing said magnitude, such that the magnitude as a function of frequency includes a pass band in a first frequency range, a stop band in a second frequency range, and a 3 dB cut-off frequency f c in a transition region therebetween, said first circuit causing said gain to substantially conform to the following frequency-dependent low pass function: ##EQU10## wherein f n1 , f 01 , Q 1 , f 02 , Q 2 , f 03 , and Q 3 are real constants and s=i·f, where i represents a complex number equal to the square root of negative one; and a second circuit coupled between said input and output for adjusting the phase to reduce non-linearity in the change in phase as a function of frequency in the pass band, without substantially changing the magnitude, and wherein the second circuit adjusts the phase substantially according to the following function: ##EQU11## wherein f 04 and Q 4 are real constants and s=i·f, where i represents the complex number equal to the square root of negative one.

Claim 26

A filter circuit having an input for receiving an analog input signal V in and having an output for producing a filtered analog output signal v out , wherein said filter circuit has a gain, defined by the ratio of v out to V in , having a magnitude and a phase dependent upon frequency f, said filter circuit comprising: a first circuit coupled between said input and output for providing said magnitude, such that the magnitude as a function of frequency includes a pass band in a first frequency range, a stop band in a second frequency range, and a 3 dB cut-off frequency f c in a transition region therebetween, said first circuit causing said gain to substantially conform to the following frequency-dependent low pass function: ##EQU10## wherein f n1 , f 01 , Q 1 , f 02 , Q 2 , f 03 , and Q 3 are real constants and s=i·f, where i represents a complex number equal to the square root of negative one; and a second circuit coupled between said input and output for adjusting the phase to reduce non-linearity in the change in phase as a function of frequency in the pass band, without substantially changing the magnitude, and wherein the second circuit adjusts the phase substantially according to the following function: ##EQU11## wherein f 04 and Q 4 are real constants and s=i·f, where i represents the complex number equal to the square root of negative one.

Claim 27

The circuit of claim 22 wherein: f 02 is less than f c ; and f 01 and f 03 are greater than f c .

Claim 28

The circuit of claim 23 wherein: Q 2 is less than one; and Q 1 and Q 3 are greater than one,

Claim 29

The circuit of claim 24 wherein f n1 is greater than f c and less than 4·f c .

Claim 30

The circuit of claim 25 wherein f 01 and f 03 are less than 1.5·f c .

Claim 31

The filter circuit of claim 22 wherein the first and second circuits are switched capacitor circuits.

Claim 32

The filter circuit of claim 27 wherein the filter circuit includes an input for receiving a clock signal having a clock frequency, said clock frequency controlling the 3 dB cut-off frequency so that the 3 dB cut-off frequency can be varied within a third frequency range.

Claim 33

The filter circuit of claim 30 wherein said filter circuit comprises a plurality of general purpose switched capacitor active filters cascaded in series so that each active filter performs a second-order filtering function.

Claim 34

The filter circuit of claim 29 wherein said general purpose switched capacitor active filters each comprise an operational amplifier, a first integrator and a second integrator cascaded in series.

Claim 35

The filter circuit of claim 29 wherein said general purpose switched capacitor active filters are monolithically integrated into a single semiconductor integrated circuit.

Claim 36

The circuit of claim 31 wherein the second circuit includes a second circuit input and a second circuit output and further includes: a band-pass filter circuit having a band-pass input coupled to the second circuit input and a band-pass output; and an operational amplifier having an amplifier input coupled to the band-pass output and an amplifier output coupled to the second circuit output.

Claim 37

The circuit of claim 32 wherein: a first resistor is coupled between the band-pass output and the amplifier input; a second resistor is coupled between the amplifier input and amplifier output; and a third resistor is coupled between the amplifier input and the band-pass input.

Claim 38

The circuit of claim 33 wherein the second and third resistors have resistance values approximately two times that of the first resistor.

Claim 39

A monolithically integrated filter circuit having an input for receiving an analog input signal v in and having an output for producing a filtered analog output signal v out , wherein said filter circuit has a gain, defined by the ratio of v out to v in , having a magnitude and a phase dependent upon frequency f, said filter circuit comprising: a first means coupled between said input and output for providing said magnitude, such that the magnitude as a function of frequency includes a pass band in a first frequency range, a stop band in a second frequency range and a 3 dB cut-off frequency in a transition region therebetween, said first means causing said magnitude to have a notch, at a notch frequency in the stop band, for improving gain selectivity of the filter circuit in the transition region; and a second means coupled between said input and output in series with said first means, said second means for adjusting the phase to reduce non-linearity in the change in phase as a function of frequency in the pass band, without substantially changing the magnitude.

Claim 40

A monolithically integrated filter circuit having an input for receiving an analog input signal v in and having an output for producing a filtered analog output signal v out , wherein said filter circuit has a gain, defined by the ratio of v out to v in , having a magnitude and a phase dependent upon frequency f, said filter circuit comprising: a first means coupled between said input and output for providing said magnitude, such that the magnitude as a function of frequency includes a pass band in a first frequency range, a stop band in a second frequency range and a 3 dB cut-off frequency in a transition region therebetween, said first means causing said magnitude to have a notch, at a notch frequency in the stop band, for improving gain selectivity of the filter circuit in the transition region; and a second means coupled between said input and output in series with said first means, said second means for adjusting the phase to reduce non-linearity in the change in phase as a function of frequency in the pass band, without substantially changing the magnitude.

Claim 41

The filter circuit of claim 35 wherein the first and second means are switched capacitor circuits.

Claim 42

The filter circuit of claim 36 wherein the filter circuit includes an input for receiving a clock signal having a clock frequency, said clock frequency controlling the 3 dB cut-off frequency so that the 3 dB cut-off frequency can be varied within a fourth frequency range.

Claim 43

The filter circuit of claim 37 wherein said filter circuit comprises a plurality of general purpose switched capacitor active filters cascaded in series so that each active filter performs a second-order filtering function.

Claim 44

The filter circuit of claim 38 wherein said general purpose switched capacitor active filters each comprise an operational amplifier, a first integrator and a second integrator cascaded in series.

Claim 45

The filter circuit of claim 39 wherein the first frequency range is below the second frequency range so that said filter circuit passes low frequencies and stops high frequencies.

Claim 46

The filter circuit of claim 39 wherein the first frequency range is above the second frequency range so that said filter circuit passes high frequencies and stops low frequencies.

Claim 47

The filter circuit of claim 35 wherein the first and second means are R-C active circuits.

Claim 48

The filter circuit of claim 42 wherein the first frequency range is below the second frequency range so that said filter circuit passes low frequencies and stops high frequencies.

Claim 49

The filter circuit of claim 42 wherein the first frequency range is above the second frequency range so that said filter circuit passes high frequencies and stops low frequencies.

Claim 50

A monolithically integrated filter circuit having an input for receiving an analog input signal v in and having an output for producing a filtered analog output signal v out , wherein said filter circuit has a gain, defined by the ratio of v out to v in , having a magnitude and a phase dependent upon frequency f, said filter circuit further comprising: first, second, third and fourth means cascaded in series, each respective means in turn having an operational amplifier, a first integrator and a second integrator cascaded in series so as to provide high pass, band pass and low pass functions at the respective outputs of said operational amplifier, first integrator and second integrator, wherein: three of said four means provide said magnitude, such that the magnitude as a function of frequency includes a pass band in a first frequency range, a stop band in a second frequency range and a 3 dB cut-off frequency in a transition region therebetween, said three means causing said magnitude to have a notch, at a notch frequency in the stop band, for improving the gain selectivity of the filter circuit in the transition region and said notch being provided by at least one of said three means including a plurality of notch-providing resistors; and said remaining one means having a plurality of resistors for adjusting the phase, so that the change in phase as a function of frequency is substantially constant in the pass band, without substantially changing the magnitude.

Claim 51

A monolithically integrated filter circuit having an input for receiving an analog input signal v in and having an output for producing a filtered analog output signal v out , wherein said filter circuit has a gain, defined by the ratio of v out to v in , having a magnitude and a phase dependent upon frequency f, said filter circuit further comprising: first, second, third and fourth means cascaded in series, each respective means in turn having an operational amplifier, a first integrator and a second integrator cascaded in series so as to provide high pass, band pass and low pass functions at the respective outputs of said operational amplifier, first integrator and second integrator, wherein: three of said four means provide said magnitude, such that the magnitude as a function of frequency includes a pass band in a first frequency range, a stop band in a second frequency range and a 3 dB cut-off frequency in a transition region therebetween, said three means causing said magnitude to have a notch, at a notch frequency in the stop band, for improving the gain selectivity of the filter circuit in the transition region and said notch being provided by at least one of said three means including a plurality of notch-providing resistors; and said remaining one means having a plurality of resistors for adjusting the phase, so that the change in phase as a function of frequency is substantially constant in the pass band, without substantially changing the magnitude.

Claim 52

The filter circuit of claim 45 wherein the filter circuit includes an input for receiving a clock signal having a clock frequency, said clock frequency controlling the 3 dB cut-off frequency so that the 3 dB cut-off frequency can be varied within a fourth frequency range.

Claim 53

The filter circuit of claim 46 wherein said first, second, third and fourth means each perform a second-order filtering function.

Claim 54

The filter circuit of claim 47 wherein the first frequency range is below the second frequency range so that said filter circuit passes low frequencies and stops high frequencies.

Claim 55

The filter circuit of claim 47 wherein the first frequency range is above the second frequency range so that said filter circuit passes high frequencies and stops low frequencies.

Claim 56

The filter circuit of claim 1 wherein the first and second active circuits are coupled in series.

Claim 57

The filter circuit of claim 22 wherein the first and second circuits are coupled in series.