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US5440239A Expired / Lapsed US ⏱️ 0.0 years remaining

Transferable solder bumps for interconnect and assembly of MCM substrates

Assignee: Honeywell Inc
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Filing: 1994-04-25
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Granted: 1995-08-08
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Expires: 2014-04-25
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Abstract

Abstract The invention uses transferable solder bump connection techniques in combination with a disposable test board to test and burn-in "as received" (i.e., untested) dies. Using transferable solder bumps, a die is first attached to the top of a disposable test board. The test board can be designed to allow 100% functional testing of the die as well as burn-in. Dies that successfully complete the test and burn-in process are considered to be "known good dies." Next, heat is applied to remove the known good die from the test board. A property of the invention is that solder bumps transfer with the die such that it can be used immediately in a flip-chip configuration and affixed to a MCM or other circuit board.

Inventors

  • 👤 Pierino I. Zappella
  • 👤 William R. Fewer

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-01 15:17
CPC Classifications
G; G01; G01R; G01R31/00; G01R31/28; G01R31/2851; G01R31/2855; G01R31/286; G01R31/2863; G01R1/00; G01R1/02; G01R1/06; G01R1/067; G01R1/073; G01R1/07307; G01R1/07314; H; H10; H10W; H10W90/00; H10W90/701; H10W90/721; H10W90/724

Claims Analysis

Total Claims: 22
Claim 1
Independent Claim 62 words
A semiconductor test device comprising: (a) a substrate; (b) an interface contact module connected to the substrate wherein the interface contact module comprises (1) an electrical contact pad on the substrate; (2) a protected conductor surface on said electrical contact pad, (3) a reflowable solder module on said protected conductor surface, and (4) an electrical contact pad on said reflowable solder module.
Claim 2
Dependent Claim 62 words
A semiconductor test device comprising: (a) a substrate; (b) an interface contact module connected to the substrate wherein the interface contact module comprises (1) an electrical contact pad on the substrate; (2) a protected conductor surface on said electrical contact pad, (3) a reflowable solder module on said protected conductor surface, and (4) an electrical contact pad on said reflowable solder module.
Claim 3
Dependent Claim 20 words
The semiconductor test device of claim 1 wherein said electrical contact pad on the substrate comprises an aluminum metalization pad.
Claim 4
Dependent Claim 42 words
The semiconductor test device of claim 1 wherein said reflowable solder module comprises a solder stack which further comprises: (a) a reflowable solder; (b) a diffusion barrier layer on said reflowable solder; and (c) a semiconductor metalization contact on said barrier layer.
Claim 5
Dependent Claim 18 words
The semiconductor test device of claim 3 wherein said diffusion barrier layer comprises copper or a nickel/copper alloy.
Claim 6
Dependent Claim 60 words
A process of assembling a semiconductor test device comprising the steps of: (a) disposing an electrical contact pad on a test device substrate; (b) disposing, on said test device substrate's electrical contact pad, a transferable solder bump module, said transferable solder bump module comprising, (1) a protected conductor surface, (2) a reflowable solder surface, and (3) an electrical contact pad.
Claim 7
Dependent Claim 60 words
A process of assembling a semiconductor test device comprising the steps of: (a) disposing an electrical contact pad on a test device substrate; (b) disposing, on said test device substrate's electrical contact pad, a transferable solder bump module, said transferable solder bump module comprising, (1) a protected conductor surface, (2) a reflowable solder surface, and (3) an electrical contact pad.
Claim 8
Dependent Claim 18 words
The process of claim 5 wherein said test device substrate's electrical contact pad comprises an aluminum metalization pad.
Claim 9
Dependent Claim 27 words
The process of claim 5 wherein said reflowable solder module further comprises a diffusion barrier surface disposed between said reflowable solder surface and said electrical contact pad.
Claim 10
Dependent Claim 16 words
The process of claim 7 wherein said diffusion barrier layer comprises copper or a nickel/copper alloy.
Claim 11
Dependent Claim 26 words
A semiconductor test module comprising: (a) a semiconductor test device in accordance with claim 1 and (b) a semiconductor die mated to said semiconductor test device.
Claim 12
Dependent Claim 54 words
A process of assembling a semiconductor test module comprising the steps of: (a) constructing a test device in accordance with claim 1 a semiconductor die having metalization pads, such that the semiconductor die's metalization pads are directly above the test device's reflowable solder modules; and (b) bonding said test device and said semiconductor die.
Claim 13
Dependent Claim 47 words
A process of testing a semiconductor die forming part of a semiconductor test module in accordance with claim 9, comprising the steps of: (a) attaching said semiconductor test module to the test device; and (b) performing a specified test with said test device on said semiconductor die.
Claim 14
Dependent Claim 58 words
A process for removing a semiconductor die forming part of a semiconductor test module in accordance with claim 9, comprising the steps of: (a) elevating the air temperature surrounding said test module to reflow the solder bonding said semiconductor die to said test module's test board; and (b) separating said semiconductor die from said test module's test board.
Claim 15
Dependent Claim 26 words
A semiconductor test module comprising: (a) a semiconductor test device in accordance with claim 2; and (b) a semiconductor die mated to said semiconductor test device.
Claim 16
Dependent Claim 55 words
A process of assembling a semiconductor test module comprising the steps of: (a) constructing a test device in accordance with claim 2 and a semiconductor die having metalization pads, such that the semiconductor die's metalization pads are directly above the test device's reflowable solder modules; and (b) bonding said test device and said semiconductor die.
Claim 17
Dependent Claim 47 words
A process of testing a semiconductor die forming part of a semiconductor test module in accordance with claim 13, comprising the steps of: (a) attaching said semiconductor test module to the test device; and (b) performing a specified test with said test device on said semiconductor die.
Claim 18
Dependent Claim 58 words
A process for removing a semiconductor die forming part of a semiconductor test module in accordance with claim 13, comprising the steps of: (a) elevating the air temperature surrounding said test module to reflow the solder bonding said semiconductor die to said test module's test board; and (b) separating said semiconductor die from said test module's test board.
Claim 19
Dependent Claim 26 words
A semiconductor test module comprising: (a) a semiconductor test device in accordance with claim 3; and (b) a semiconductor die mated to said semiconductor test device.
Claim 20
Dependent Claim 55 words
A process of assembling a semiconductor test module comprising the steps of: (a) constructing a test device in accordance with claim 3 and a semiconductor die having metalization pads, such that the semiconductor die's metalization pads are directly above the test device's reflowable solder modules; and (b) bonding said test device and said semiconductor die.
Claim 21
Dependent Claim 47 words
A process of testing a semiconductor die forming part of a semiconductor test module in accordance with claim 17, comprising the steps of: (a) attaching said semiconductor test module to the test device; and (b) performing a specified test with said test device on said semiconductor die.
Claim 22
Dependent Claim 58 words
A process for removing a semiconductor die forming part of a semiconductor test module in accordance with claim 17, comprising the steps of: (a) elevating the air temperature surrounding said test module to reflow the solder bonding said semiconductor die to said test module's test board; and (b) separating said semiconductor die from said test module's test board.

References Cited (Backward Citations)

US5189505A Cited
US5217597A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1998-08-07 1999-02-06 1999-08-08 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2002-08-07 2003-02-06 2003-08-08 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2006-08-07 2007-02-06 2007-08-08 $7700.00 Window Closed / Lapsed

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