US5440224A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Reference voltage generating circuit formed of bipolar transistors
Assignee: NEC Corp
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Filing: 1994-11-16
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Granted: 1995-08-08
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Expires: 2014-11-16
Abstract
Abstract A reference voltage generating circuit comprising a first and second transistors whose base-to-emitter voltages are different from each other and a constant current source to drive said respective transistors. Since the base-to-emitter voltages are different from each other, the circuit scarcely has a temperature characteristic with a reduced circuit scale. The first and second transistors preferably have different emitter areas. The current source is preferably a current mirror circuit composed of third and fourth transistors whose emitter areas are different from each other to drive the first and second transistors by different currents.
Inventors
- 👤 Katsuji Kimura
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-04 19:18
CPC Classifications
G; G05; G05F; G05F3/00; G05F3/02; G05F3/08; G05F3/10; G05F3/16; G05F3/20; G05F3/26; G05F3/265; G05F3/30
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
249 words
A reference voltage generating circuit comprising: a first bipolar transistor; a second bipolar transistor whose emitter area is K 1 times as large as that of said first transistor, where K 1> 1; a first resistor connected to an emitter of said second transistor, said emitter of said second transistor being connected to an emitter of said first transistor through said first resistor; a constant current source for driving said first transistor and said second transistor, said constant current source being a current mirror circuit comprising a third bipolar transistor and a fourth bipolar transistor; a collector of said first transistor being connected to a collector of said third transistor through a second resistor; said collector of said first transistor being connected directly to a base of said first transistor and directly to a base of said second transistor; emitters of said third and fourth transistors being coupled together; bases of said third and fourth transistors being coupled together; said base and a collector of said fourth transistor being coupled together; a collector of said second transistor being connected to said collector of said fourth transistor; an emitter area of said third transistor being K 2 times as large as that of said fourth transistor for driving said first transistor at a driving current K 2 times as large as that of said second transistor, where K 2> 1; and an output being derived from a connecting point of said second resistor and said collector of said third transistor.
Claim 2
Dependent Claim
249 words
A reference voltage generating circuit comprising: a first bipolar transistor; a second bipolar transistor whose emitter area is K 1 times as large as that of said first transistor, where K 1> 1; a first resistor connected to an emitter of said second transistor, said emitter of said second transistor being connected to an emitter of said first transistor through said first resistor; a constant current source for driving said first transistor and said second transistor, said constant current source being a current mirror circuit comprising a third bipolar transistor and a fourth bipolar transistor; a collector of said first transistor being connected to a collector of said third transistor through a second resistor; said collector of said first transistor being connected directly to a base of said first transistor and directly to a base of said second transistor; emitters of said third and fourth transistors being coupled together; bases of said third and fourth transistors being coupled together; said base and a collector of said fourth transistor being coupled together; a collector of said second transistor being connected to said collector of said fourth transistor; an emitter area of said third transistor being K 2 times as large as that of said fourth transistor for driving said first transistor at a driving current K 2 times as large as that of said second transistor, where K 2> 1; and an output being derived from a connecting point of said second resistor and said collector of said third transistor.
Claim 3
Dependent Claim
248 words
A reference voltage generating circuit comprising: a first PNP bipolar transistor; a second PNP bipolar transistor whose emitter area is K 1 times as large as that of said first transistor, where K 1> 1; emitters of said first and second transistors being directly coupled with each other; a constant current source for driving said first transistor and said second transistor, said constant current source being a current mirror circuit comprising a third bipolar transistor and a fourth bipolar transistor; a collector of said first transistor being connected to a base of said second transistor and connected to a collector of said third transistor through a first resistor and a second resistor serially connected to each other; said collector of said first transistor being connected through said first resistor to a base of said first transistor; emitters of said third and fourth transistors being coupled together; a collector of said second transistor being connected to said collector of said fourth transistor and to a base of said fourth transistor; a base of said third transistor being connected directly to said base of said fourth transistor; an emitter area of said third transistor being K 2 times as large as that of said fourth transistor for driving said first transistor at a driving current K 2 times as large as that of said second transistor, where K 2> 1; and an output being derived from a connecting point of said second resistor and said collector of said third transistor.
Claim 4
Dependent Claim
248 words
A reference voltage generating circuit comprising: a first PNP bipolar transistor; a second PNP bipolar transistor whose emitter area is K 1 times as large as that of said first transistor, where K 1> 1; emitters of said first and second transistors being directly coupled with each other; a constant current source for driving said first transistor and said second transistor, said constant current source being a current mirror circuit comprising a third bipolar transistor and a fourth bipolar transistor; a collector of said first transistor being connected to a base of said second transistor and connected to a collector of said third transistor through a first resistor and a second resistor serially connected to each other; said collector of said first transistor being connected through said first resistor to a base of said first transistor; emitters of said third and fourth transistors being coupled together; a collector of said second transistor being connected to said collector of said fourth transistor and to a base of said fourth transistor; a base of said third transistor being connected directly to said base of said fourth transistor; an emitter area of said third transistor being K 2 times as large as that of said fourth transistor for driving said first transistor at a driving current K 2 times as large as that of said second transistor, where K 2> 1; and an output being derived from a connecting point of said second resistor and said collector of said third transistor.
Claim 5
Dependent Claim
259 words
A reference voltage generating circuit comprising: a first PNP bipolar transistor; a second PNP bipolar transistor whose emitter area is K 1 times as large as that of said first transistor, where K 1> 1; a first resistor connected to an emitter of said second transistor, said emitter of said second transistor being connected to an emitter of said first transistor through said first resistor; a constant current source for driving said first transistor and said second transistor, said constant current source being a current mirror circuit comprising a third NPN bipolar transistor and a fourth NPN bipolar transistor; a collector of said first transistor being connected to a collector of said third transistor through a second resistor; said collector of said first transistor being connected to a base of said first transistor; said base of said first transistor being connected directly to a base of said second transistor; emitters of said third and fourth transistors being coupled together; bases of said third and fourth transistors being coupled together; said base and a collector of said fourth transistor being coupled together; a collector of said second transistor being connected to said collector of said fourth transistor; an emitter area of said third transistor being K 2 times as large as that of said fourth transistor for driving said first transistor at a driving current K 2 times as large as that of said second transistor, where K 2> 1; and an output being derived from a connecting point of said second resistor and said collector of said third transistor.
Claim 6
Dependent Claim
259 words
A reference voltage generating circuit comprising: a first PNP bipolar transistor; a second PNP bipolar transistor whose emitter area is K 1 times as large as that of said first transistor, where K 1> 1; a first resistor connected to an emitter of said second transistor, said emitter of said second transistor being connected to an emitter of said first transistor through said first resistor; a constant current source for driving said first transistor and said second transistor, said constant current source being a current mirror circuit comprising a third NPN bipolar transistor and a fourth NPN bipolar transistor; a collector of said first transistor being connected to a collector of said third transistor through a second resistor; said collector of said first transistor being connected to a base of said first transistor; said base of said first transistor being connected directly to a base of said second transistor; emitters of said third and fourth transistors being coupled together; bases of said third and fourth transistors being coupled together; said base and a collector of said fourth transistor being coupled together; a collector of said second transistor being connected to said collector of said fourth transistor; an emitter area of said third transistor being K 2 times as large as that of said fourth transistor for driving said first transistor at a driving current K 2 times as large as that of said second transistor, where K 2> 1; and an output being derived from a connecting point of said second resistor and said collector of said third transistor.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1998-08-07 | 1999-02-06 | 1999-08-08 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2002-08-07 | 2003-02-06 | 2003-08-08 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2006-08-07 | 2007-02-06 | 2007-08-08 | $7700.00 | Window Closed / Lapsed |