Semiconductor device with reinforcement

Claim 2

A multi-chip semiconductor device with reinforcement and chip parts comprising a plurality of semiconductor device layers which are stacked, wherein each of said semiconductor device layers has a tape carrier type semiconductor module and a frame having electrodes on the both side thereof and having at least one first hole or depression in which said tape carrier type semiconductor module is mounted, said electrodes and said tape carrier type semiconductor module being electrically connected, said frame further having at least one second hole or depression in which said chip parts are mounted, said chip parts being comprised of at least one of a capacitor and resistor, and wherein each of said semiconductor device layers has through holes for connecting said electrodes of respective ones of said semiconductor device layers, said electrodes having the same function with respect to each said tape carrier type semiconductor module.

Claim 3

A multi-chip semiconductor device according to claim 2, wherein said frame has a structure comprised of a plurality of circuit layers which are stacked and wherein said circuit layers are electrically connected with each other through conductor portions to form an electric circuit with said tape carrier type semiconductor module and said chip parts comprised of at least one of a capacitor and resistor.

Claim 4

A multi-chip semiconductor device according to claim 1, wherein the types of LSI chips mounted on said semiconductor device layers are of the same type.

Claim 5

A multi-chip semiconductor device according to claim 1, wherein LSI chips mounted on said semiconductor device layers are of at least two different types.

Claim 6

A multi-chip semiconductor device according to claim 1, wherein at least one wiring pattern comprised of a thin metal layer on said frames is enlarged in area with no relation to an electric circuit to improve a heat release efficiency of said semiconductor module.

Claim 7

A multi-chip semiconductor device according to claim 1, wherein said chip parts mounted in said second holes or on electrodes at said second depression on said frames are chip capacitors which serve for improving electric properties at high speed operation of LSIs on said tape carrier type semiconductor modules connected electrically to said frames.

Claim 8

A multi-chip semiconductor device according to claim 1, wherein each of said frames is comprised of glass-epoxy.

Claim 9

A multi-chip semiconductor device according to claim 2, wherein the types of LSI chips mounted on said semiconductor device layers are of the same type.

Claim 10

A multi-chip semiconductor device according to claim 2, wherein LSI chips mounted on said semiconductor device layers are of at least two different types.

Claim 11

A multi-chip semiconductor device according to claim 2, wherein at least one wiring pattern comprised of a thin metal layer on said frames is enlarged in area no relation to an electric circuit to improve a heat release efficiency of said semiconductor device.

Claim 12

A multi-chip semiconductor device according to claim 2, wherein said chip parts mounted in said second holes or on depression-shaped electrodes on said frames are chip capacitors which serve for improving electric properties at high speed operation of LSIs on said tape carrier type semiconductor modules connected electrically to said frames.

Claim 13

A multi-chip semiconductor device with reinforcement, comprising frames, flexible circuit layers, chip parts and tape carrier type semiconductor modules, wherein said semiconductor device is comprised of a plurality of semiconductor device layers which are stacked and each of which has a frame having conductive electrodes on both sides thereof, said frame having at least one hole or depression, and a thin flexible circuit layer having a specified circuit on a surface thereof, said thin flexible circuit layer being connected electrically to one surface of said frame, wherein at least one of said chip parts comprised of at least one of a capacitor and a resistor is mounted in said at least one hole or depression on said frame or is mounted on said flexible circuit layer in each of said semiconductor device layers, wherein each of said tape carrier type semiconductor modules is mounted on and connected electrically to a surface of said frame on a side thereof opposite to the side which said flexible circuit layer is connected, and wherein each of said semiconductor device layers has through-holes for connecting said electrodes of respective ones of said semiconductor device layers, said electrodes having the same function with respect to each of said tape carrier type semiconductor modules.

Claim 14

A multi-chip semiconductor device with reinforcement, comprising frames, flexible circuit layers, chip parts and tape carrier type semiconductor modules, wherein said semiconductor device is comprised of a plurality of semiconductor device layers which are stacked and each of which has a frame having conductive electrodes on both sides thereof, said frame having at least one hole or depression, and a thin flexible circuit layer having a specified circuit on a surface thereof, said thin flexible circuit layer being connected electrically to one surface of said frame, wherein at least one of said chip parts comprised of at least one of a capacitor and a resistor is mounted in said at least one hole or depression on said frame or is mounted on said flexible circuit layer in each of said semiconductor device layers, wherein each of said tape carrier type semiconductor modules is mounted on and connected electrically to a surface of said frame on a side thereof opposite to the side which said flexible circuit layer is connected, and wherein each of said semiconductor device layers has through-holes for connecting said electrodes of respective ones of said semiconductor device layers, said electrodes having the same function with respect to each of said tape carrier type semiconductor modules.

Claim 15

A multi-chip semiconductor device according to claim 12, wherein said frame has a structure comprised of a plurality of circuit layers which are stacked and wherein said circuit layers are electrically connected with each other through conductor portions to form an electric circuit with said flexible circuit layer.

Claim 16

A multi-chip semiconductor device according to claim 12, wherein the types of LSI chips mounted on said semiconductor device layers are of the same type.

Claim 17

A multi-chip semiconductor device according to claim 12, wherein LSI chips mounted on said semiconductor device layers are of at least two different types.

Claim 18

A multi-chip semiconductor device according to claim 12, wherein at least one wiring pattern comprised of a thin metal layer on each of said frames is enlarged in area with no relation to an electric circuit to improve a heat release efficiency of said semiconductor device.

Claim 19

A multi-chip semiconductor device according to claim 12, wherein at least one metal foil pattern for heat release is provided on said flexible circuit layers, said metal foil pattern being enlarged in area with no relation to an electric circuit to improve a heat release efficiency of said semiconductor device.

Claim 20

A multi-chip semiconductor device according to claim 12, wherein said chip parts are mounted in said holes or on depression-shaped electrodes on said frames are chip capacitors which serve for improving electric properties at high speed operation of LSIs on said tape carrier type semiconductor modules connected electrically to said frames.

Claim 21

A multi-chip semiconductor device according to claim 12, wherein said semiconductor device layers are stacked so that said flexible circuit layer of each of said semiconductor device layers is located between a lower surface of the frame of said semiconductor device layer which said flexible circuit layer is a part of and an upper surface of the frame of said semiconductor device layer which is below the semiconductor device layer which said flexible circuit layer is a part of.

Claim 22

A multi-chip semiconductor device according to claim 12, wherein each of said frames is comprised of glass-epoxy.

Claim 23

A multi-chip semiconductor device according to claim 12, wherein each of said semiconductor device layers is formed so that an upper surface of the frame of the semiconductor device layer has an opening, wherein said flexible circuit layer of said semiconductor device layer is mounted on the bottom surface of the frame and forms a bottom for the opening, and wherein the tape carrier type semiconductor module of the semiconductor device layer is located within the opening, with lead electrodes of said tape carrier type semiconductor module being connected to the upper surface of the frame.

Claim 24

A multi-chip semiconductor device according to claim 13, wherein at least one metal foil pattern for heat release is provided on said flexible circuit layers, said metal foil pattern being enlarged in area with no relation to an electric circuit to improve a heat release efficiency of said semiconductor module.

Claim 25

A multi-chip semiconductor device according to claim 13, wherein at least one thin metal layer on said frames and at least one metal layer on said flexible circuit layers there are provided patterns for heat release enlarging the area of said patterns with no relation to an electric circuit to improve a heat release efficiency of said semiconductor module.

Claim 26

A multi-chip semiconductor device according to claim 13, wherein said chip parts mounted on said flexible circuit layers are chip capacitors which serve for improving electric properties at high speed operation of LSIs on said tape carrier type semiconductor modules connected electrically to said frames.

Claim 27

A multi-chip semiconductor device according to claim 13, wherein said chip parts are mounted on flexible circuit layers other than said flexible circuit layers formed on said frames.

Claim 28

A multi-chip semiconductor device according to claim 19, wherein each of said frames is comprised of glass-epoxy.

Claim 29

A circuit substrate comprising at least one multi-chip semiconductor device located on a first main surface of said substrate, wherein said multi-chip semiconductor device comprises a plurality of semiconductor device layers which are stacked, wherein each of said semiconductor device layers has a tape carrier type semiconductor module and a frame having electrodes on the both sides thereof and having at least one first hole or depression in which said tape carrier type semiconductor module is mounted, said electrodes and said tape carrier type semiconductor module being electrically connected, said frame further having at least one second hole or depression in which said chip parts are mounted, said chip parts being comprised of at least one of a capacitor and resistor, and wherein each of said semiconductor device layers has through holes for connecting said electrodes of respective ones of said semiconductor device layers, said electrodes having the same function with respect to each said tape carrier type semiconductor module.

Claim 30

A circuit substrate comprising at least one multi-chip semiconductor device located on a first main surface of said substrate, wherein said multi-chip semiconductor device comprises a plurality of semiconductor device layers which are stacked, wherein each of said semiconductor device layers has a tape carrier type semiconductor module and a frame having electrodes on the both sides thereof and having at least one first hole or depression in which said tape carrier type semiconductor module is mounted, said electrodes and said tape carrier type semiconductor module being electrically connected, said frame further having at least one second hole or depression in which said chip parts are mounted, said chip parts being comprised of at least one of a capacitor and resistor, and wherein each of said semiconductor device layers has through holes for connecting said electrodes of respective ones of said semiconductor device layers, said electrodes having the same function with respect to each said tape carrier type semiconductor module.

Claim 31

A circuit substrate comprising at least one multi-chip semiconductor device located on a first main surface of said substrate, wherein said multi-chip semiconductor device comprises frames, flexible circuit layers, chip parts and tape carrier type semiconductor modules, wherein said semiconductor device is comprised of a plurality of semiconductor device layers which are stacked and each of which has a frame having conductive electrodes on both sides thereof, said frame having at least one hole or depression, and a thin flexible circuit layer having a specified circuit on a surface thereof, said thin flexible circuit layer being connected electrically to one surface of said frame, wherein at least one of said chip parts comprised of at least one of a capacitor and a resistor is mounted in said at least one hole or depression on said frame or is mounted on said flexible circuit layer in each of said semiconductor device layers, wherein each of said tape carrier type semiconductor modules is mounted on and connected electrically to a surface of said frame on a side thereof opposite to the side which said flexible circuit layer is connected, and wherein each of said semiconductor device layers has through-holes for connecting said electrodes of respective ones of said semiconductor device layers, said electrodes having the same function with respect to each of said tape carrier type semiconductor modules.

Claim 32

A circuit substrate comprising at least one multi-chip semiconductor device located on a first main surface of said substrate, wherein said multi-chip semiconductor device comprises frames, flexible circuit layers, chip parts and tape carrier type semiconductor modules, wherein said semiconductor device is comprised of a plurality of semiconductor device layers which are stacked and each of which has a frame having conductive electrodes on both sides thereof, said frame having at least one hole or depression, and a thin flexible circuit layer having a specified circuit on a surface thereof, said thin flexible circuit layer being connected electrically to one surface of said frame, wherein at least one of said chip parts comprised of at least one of a capacitor and a resistor is mounted in said at least one hole or depression on said frame or is mounted on said flexible circuit layer in each of said semiconductor device layers, wherein each of said tape carrier type semiconductor modules is mounted on and connected electrically to a surface of said frame on a side thereof opposite to the side which said flexible circuit layer is connected, and wherein each of said semiconductor device layers has through-holes for connecting said electrodes of respective ones of said semiconductor device layers, said electrodes having the same function with respect to each of said tape carrier type semiconductor modules.

Claim 33

A stacked semiconductor device comprising a plurality of semiconductor device layers stacked on one another, wherein each of said semiconductor device layers comprises: a frame having an upper surface and a lower surface, wherein said frame has electrodes on said upper surface and said lower surface, and further wherein said frame has a first opening extending from the upper surface to the lower surface; a flexible circuit layer having a predetermined circuit formed on a surface thereof, wherein said flexible circuit layer is mounted on said lower surface of said frame to form a bottom for the first opening of said frame; and a tape carrier type semiconductor module located in said first opening, and including lead electrodes extending from said tape carrier type semiconductor module and connected to electrodes on said upper surface of said frame, wherein said frame further includes a second opening in said upper surface of the frame, and wherein a chip part selected from a group consisting of a capacitor and a resistor is located within said second opening.

Claim 34

A stacked semiconductor device comprising a plurality of semiconductor device layers stacked on one another, wherein each of said semiconductor device layers comprises: a frame having an upper surface and a lower surface, wherein said frame has electrodes on said upper surface and said lower surface, and further wherein said frame has a first opening extending from the upper surface to the lower surface; a flexible circuit layer having a predetermined circuit formed on a surface thereof, wherein said flexible circuit layer is mounted on said lower surface of said frame to form a bottom for the first opening of said frame; and a tape carrier type semiconductor module located in said first opening, and including lead electrodes extending from said tape carrier type semiconductor module and connected to electrodes on said upper surface of said frame, wherein said frame further includes a second opening in said upper surface of the frame, and wherein a chip part selected from a group consisting of a capacitor and a resistor is located within said second opening.

Claim 35

A stacked semiconductor device according to claim 29, wherein each of said semiconductor device layers further includes through-holes extending through said frames for connecting electrodes of respective ones of said semiconductor device layers to one another.

Claim 36

A stacked semiconductor device according to claim 29, wherein each of said frames is comprised of glass-epoxy.

Claim 37

A stacked semiconductor device comprising a plurality of semiconductor device layers stacked on one another, wherein each of said semiconductor device layers comprises: a frame having an upper surface and a lower surface, wherein said frame has electrodes on said upper surface and said lower surface, and further wherein said frame has a first opening extending from the upper surface to the lower surface; a flexible circuit layer having a predetermined circuit formed on a surface thereof, wherein said flexible circuit layer is mounted on said lower surface of said frame to form a bottom for the first opening of said frame; and a tape carrier type semiconductor module located in said first opening, and including lead electrodes extending from said tape carrier type semiconductor module and connected to electrodes on said upper surface of said frame, wherein said semiconductor device layer further comprises a chip part selected from a group consisting of a capacitor and a resistor, wherein said chip part is mounted on said flexible circuit layer.

Claim 38

A stacked semiconductor device comprising a plurality of semiconductor device layers stacked on one another, wherein each of said semiconductor device layers comprises: a frame having an upper surface and a lower surface, wherein said frame has electrodes on said upper surface and said lower surface, and further wherein said frame has a first opening extending from the upper surface to the lower surface; a flexible circuit layer having a predetermined circuit formed on a surface thereof, wherein said flexible circuit layer is mounted on said lower surface of said frame to form a bottom for the first opening of said frame; and a tape carrier type semiconductor module located in said first opening, and including lead electrodes extending from said tape carrier type semiconductor module and connected to electrodes on said upper surface of said frame, wherein said semiconductor device layer further comprises a chip part selected from a group consisting of a capacitor and a resistor, wherein said chip part is mounted on said flexible circuit layer.

Claim 39

A stacked semiconductor device according to claim 32, wherein each of said semiconductor device layers further includes through-holes extending through said frames for connecting electrodes of respective ones of said semiconductor device layers to one another.

Claim 40

A stacked semiconductor device according to claim 32, wherein each of said frames is comprised of glass-epoxy.