Amplifier bias control system

Claim 2

System for controlling the bias of an amplifier receiving an input signal and a bias signal, said amplifier producing an amplified output signal and including: means for sampling a fraction of said input signal and supplying a sampled signal; means for attenuating said sampled signal and supplying an attenuated signal; means for detecting said attenuated signal and supplying a detected voltage; means for comparing said detected voltage with a reference voltage and supplying a logic level; control means receiving said logic level and supplying a control signal applied to said attenuator means so that said detected voltage is substantially equal to said reference voltage; means for generating said bias signal receiving said control signal from said control means, said means cooperating with each other so that the gain of said amplifier is constant and in the linear range of amplification and so that the bias of said amplifier is as low as possible commensurate with amplification of said input signal without clipping.

Claim 3

System according to claim 1 wherein said control means comprise a counter-downcounter generating binary words.

Claim 4

System according to claim 1 wherein said means for generating said bias signal comprise a digital-analog converter receiving said binary words from said counter-downcounter and supplying an analog signal to a lowpass filter whose output signal constitutes said bias signal.

Claim 5

System according to claim 1 wherein said attenuator means comprise a set of digitally controlled attenuators connected in cascade, said attenuators cooperating with a decoder receiving said binary words.

Claim 6

System according to claim 1 wherein said amplifier includes at least one microwave transistor.

Claim 7

System for controlling the bias of an amplifier receiving input signals and a bias signal, said amplifier supplying an amplified output signal, including: means for sampling a fraction of said input signal and supplying a first sampled signal; means for sampling a fraction of said output signal and supplying a second sampled signal; means for attenuating said first sampled signal and supplying a first attenuated signal; means for attenuating said second sampled signal and supplying a second attenuated signal; means for detecting said first attenuated signal and supplying a first detected voltage; means for detecting said second attenuated signal and supplying a second detected voltage; means for comparing said first detected voltage with a first reference voltage and supplying a first logic level; means for comparing said second detected voltage with a second reference voltage and supplying a second logic level; control means receiving said first logic level and supplying a first control signal applied to said means for attenuating said first sampled signal so that said first detected voltage is substantially equal to said first reference voltage; control means receiving said second logic level and supplying a second control signal applied to said means for attenuating said second sampled signal so that said second detected voltage is substantially equal to said second reference voltage; means for subtracting said first control signal from said second control signal to obtain a difference signal; means for generating said bias signal receiving said difference signal and supplying to said amplifier a voltage Vco equal to: Vco=Vpo+μ.Va.sub.1 -h.(Va.sub.2 -Va.sub.1) where Vpo is an offset voltage, μ and h are constants, and Va 1 and Va 2 are respectively said first and second control signals.

Claim 8

System for controlling the bias of an amplifier receiving input signals and a bias signal, said amplifier supplying an amplified output signal, including: means for sampling a fraction of said input signal and supplying a first sampled signal; means for sampling a fraction of said output signal and supplying a second sampled signal; means for attenuating said first sampled signal and supplying a first attenuated signal; means for attenuating said second sampled signal and supplying a second attenuated signal; means for detecting said first attenuated signal and supplying a first detected voltage; means for detecting said second attenuated signal and supplying a second detected voltage; means for comparing said first detected voltage with a first reference voltage and supplying a first logic level; means for comparing said second detected voltage with a second reference voltage and supplying a second logic level; control means receiving said first logic level and supplying a first control signal applied to said means for attenuating said first sampled signal so that said first detected voltage is substantially equal to said first reference voltage; control means receiving said second logic level and supplying a second control signal applied to said means for attenuating said second sampled signal so that said second detected voltage is substantially equal to said second reference voltage; means for subtracting said first control signal from said second control signal to obtain a difference signal; means for generating said bias signal receiving said difference signal and supplying to said amplifier a voltage Vco equal to: Vco=Vpo+μ.Va.sub.1 -h.(Va.sub.2 -Va.sub.1) where Vpo is an offset voltage, μ and h are constants, and Va 1 and Va 2 are respectively said first and second control signals.

Claim 9

System according to claim 6 wherein each detector means comprises a voltage detector diode and each of said first and second reference voltages is equal to: Vr-k.V.(To-T) where Vr is a fixed voltage, k is a positive temperature constant of a temperature sensing diode disposed near the respective voltage detector diode, V is the voltage supplied by said temperature sensing diode, To is a reference temperature and T is ambient temperature.

Claim 10

System for controlling the bias of an amplifier receiving an input signal and a bias signal, said amplifier producing an amplified output signal and including: means for sampling a fraction of said output signal and supplying a sampled signal; means for attenuating said sampled signal and supplying an attenuated signal; means for detecting said attenuated signal and supplying a detected voltage; means for comparing said detected voltage with a reference voltage and supplying a logic level; control means receiving said logic level and supplying a control signal applied to said attenuator means so that said detected voltage is substantially equal to said reference voltage; means for generating said bias signal receiving said control signal from said control means, said means cooperating with each other so that the gain of said amplifier is constant and in the linear range of amplification and so that the bias of said amplifier is as low as possible, commensurate with amplification of said input signal without clipping.

Claim 11

System for controlling the bias of an amplifier receiving an input signal and a bias signal, said amplifier producing an amplified output signal and including: means for sampling a fraction of said output signal and supplying a sampled signal; means for attenuating said sampled signal and supplying an attenuated signal; means for detecting said attenuated signal and supplying a detected voltage; means for comparing said detected voltage with a reference voltage and supplying a logic level; control means receiving said logic level and supplying a control signal applied to said attenuator means so that said detected voltage is substantially equal to said reference voltage; means for generating said bias signal receiving said control signal from said control means, said means cooperating with each other so that the gain of said amplifier is constant and in the linear range of amplification and so that the bias of said amplifier is as low as possible, commensurate with amplification of said input signal without clipping.

Claim 12

System according to claim 8, wherein said control means comprise a counter-downcounter generating binary words.

Claim 13

System according to claim 8, wherein said means for generating said bias signal comprise a digital-analog converter receiving said binary words from said counter-downcounter and supplying an analog signal to a lowpass filter whose output signal constitutes said bias signal.

Claim 14

System according to claim 8, wherein said attenuator means comprise a set of digitally controlled attenuators connected in cascade, said attenuators cooperating with a decoder receiving said binary words.

Claim 15

System according to claim 8, wherein said amplifier includes at least one microwave transistor.