US5427971A
Expired / Lapsed
US
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Method for fabrication of semiconductor elements
Assignee: SK Hynix Inc
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Filing: 1994-03-01
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Granted: 1995-06-27
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Expires: 2014-03-01
Abstract
Abstract This invention relates to a method for fabrication of MOS transistors having LDD(Lightly Doped Drain) structure which comprises the steps of forming a gate insulation film on a semiconductor substrate of a first conduction type, forming a conduction layer for forming a gate pole on the gate insulation film, forming an oxidation prevention layer on the conduction layer, carrying out selective etchings of the oxidation prevention layer and the conduction layer to a certain thicknesses of areas except the gate pole area, forming an oxide film by an oxidation of the exposed portion of the conduction layer, carrying out a selective etching of the oxide film by using the oxidation prevention layer as a mask, forming a high density impurity area of a second conduction type in a predetermined area of the semiconductor substrate by a high density ion injection of the second conduction type impurity, removing the oxidation prevention layer and the oxide film, forming a low density impurity area of the second conduction type in a predetermined area of the semiconductor substrate by a low density ion injection of impurity of the second conduction type using the conduction layer as a mask, and carrying out an annealing under an oxidation process atmosphere.
Inventors
- 👤 Chang J. Lee
- 👤 Gong H. Park
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-01 15:45
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/01; H10D30/021; H10D30/022; H10D30/0223; H10D30/0227; H10D30/60; H10D30/601; H10D30/605; H10P; H10P30/00; H10P30/20; H10P30/202; H10P30/204; Y; Y10; Y10S; Y10S148/00; Y10S148/117; Y10S438/00; Y10S438/911
Claims Analysis
Total Claims: 23
Claim 1
Independent Claim
198 words
A method for fabricating semiconductor elements comprising the the steps of: forming a gate insulation film on a semiconductor substrate of a first conduction type; forming a conduction layer for forming a gate pole on the gate insulation film; forming an oxidation prevention layer on the conduction layer; carrying out selective etchings of the oxidation prevention layer and the conduction layer to a certain thicknesses of areas except a gate pole area; forming an oxide film by an oxidation of the conduction layer except the area of the oxidation prevention area; carrying out a selective etching of the oxide film by using the oxidation prevention layer as a mask; forming a high density impurity area of a second conduction type in the semiconductor substrate by a high density ion injection of the second conduction type impurity using the oxidation prevention layer as a mask; removing the oxidation prevention layer and the oxide film; forming a low density impurity area of the second conduction type in the semiconductor substrate by a low density ion injection of impurity of the second condition type using the conduction layer as a mask; and carrying out an annealing under an oxidation process atmosphere.
Claim 2
Independent Claim
198 words
A method for fabricating semiconductor elements comprising the the steps of: forming a gate insulation film on a semiconductor substrate of a first conduction type; forming a conduction layer for forming a gate pole on the gate insulation film; forming an oxidation prevention layer on the conduction layer; carrying out selective etchings of the oxidation prevention layer and the conduction layer to a certain thicknesses of areas except a gate pole area; forming an oxide film by an oxidation of the conduction layer except the area of the oxidation prevention area; carrying out a selective etching of the oxide film by using the oxidation prevention layer as a mask; forming a high density impurity area of a second conduction type in the semiconductor substrate by a high density ion injection of the second conduction type impurity using the oxidation prevention layer as a mask; removing the oxidation prevention layer and the oxide film; forming a low density impurity area of the second conduction type in the semiconductor substrate by a low density ion injection of impurity of the second condition type using the conduction layer as a mask; and carrying out an annealing under an oxidation process atmosphere.
Claim 3
Dependent Claim
26 words
The method as claimed in claim 1, wherein the first conduction type semiconductor substrate is a P type semiconductor substrate or a N type semiconductor substrate.
Claim 4
Dependent Claim
20 words
The method as claimed in claim 1, wherein the first conduction type semiconductor substrate comprises a P-well and an N-well.
Claim 5
Dependent Claim
22 words
The method as claimed in claim 1, wherein the conduction layer is formed of any selected one of polysilicon or amorphous silicon.
Claim 6
Dependent Claim
19 words
The method as claimed in claim 1, wherein the oxidation prevention layer is formed of a silicon nitride film.
Claim 7
Dependent Claim
27 words
The method as claimed in claim 1, wherein the conduction layer is oxidized so as to make the oxide film to contact with the gate insulation film.
Claim 8
Dependent Claim
33 words
The method as claimed in claim 1, wherein the process for selective etching of the oxide film using the oxidation prevention film as a mask is carried out utilizing reactive ion etching method.
Claim 9
Dependent Claim
29 words
The method as claimed in claim 1, wherein As, BF 2 or B are used for the ion injected second conduction impurity for forming the high density impurity area.
Claim 10
Dependent Claim
31 words
The method as claimed in claim 1, wherein P+ or As, BF 2 or B are utilized for the ion injected second conduction impurity for forming the low density impurity area.
Claim 11
Dependent Claim
44 words
The method as claimed in claim 1, wherein a dose of the impurity in the ion injection for forming the low density impurity area is lower by 2 order than the dose of the impurity ion injected for forming the high density impurity area.
Claim 12
Dependent Claim
26 words
The method as claimed in claim 1, wherein the process for removing the oxidation prevention layer and the oxide film is carried out with wet etching.
Claim 13
Dependent Claim
54 words
The method as claimed in claim 1, wherein a forming of junctions of the high and low density impurity areas together with an oxidation of the exposed surface portion of the conduction layer to form a gate pole having a vertical side profile are made by the annealing process under an oxidation process atmosphere.
Claim 14
Independent Claim
144 words
A method for fabricating semiconductor elements comprising the steps of: forming a gate insulation film on a semiconductor substrate of a first conduction type; forming a conduction layer for forming a gate pole on the gate insulation film; forming an oxidation preventing layer on the conduction layer; carrying out selective etchings of the oxidation prevention layer and the conduction layer for a certain thicknesses of areas except the gate pole area; forming an oxide film by an oxidation of the exposed portion of the conduction layer; removing the oxidation prevention layer and the oxide film; forming a high density impurity area and a low density impurity area of the second conduction type in the semiconductor substrate by ion injections of impurity of the second conduction type using the etched conduction layer as a mask; and carrying out an annealing under an oxidation process atmosphere.
Claim 15
Independent Claim
144 words
A method for fabricating semiconductor elements comprising the steps of: forming a gate insulation film on a semiconductor substrate of a first conduction type; forming a conduction layer for forming a gate pole on the gate insulation film; forming an oxidation preventing layer on the conduction layer; carrying out selective etchings of the oxidation prevention layer and the conduction layer for a certain thicknesses of areas except the gate pole area; forming an oxide film by an oxidation of the exposed portion of the conduction layer; removing the oxidation prevention layer and the oxide film; forming a high density impurity area and a low density impurity area of the second conduction type in the semiconductor substrate by ion injections of impurity of the second conduction type using the etched conduction layer as a mask; and carrying out an annealing under an oxidation process atmosphere.
Claim 16
Dependent Claim
26 words
The method as claimed in claim 13, wherein the first conduction type semiconductor substrate is a P type semiconductor substrate or a N type semiconductor substrate.
Claim 17
Dependent Claim
20 words
The method as claimed in claim 13, wherein the first conduction type semiconductor substrate comprises a P-well and an N-well.
Claim 18
Dependent Claim
22 words
The method as claimed in claim 13, wherein the conduction layer is formed of any selected one of polysilicon or amorphous silicon.
Claim 19
Dependent Claim
19 words
The method as claimed in claim 13, wherein the oxidation prevention layer is formed of a silicon nitride film.
Claim 20
Dependent Claim
27 words
The method as claimed in claim 13, wherein the conduction layer is oxidized so as to make the oxide film to contact with the gate insulation film.
Claim 21
Dependent Claim
27 words
The method as claimed in claim 13, wherein As, BF 2 or B are used for the ion injected second conduction impurity for forming the impurity area.
Claim 22
Dependent Claim
54 words
The method as claimed in claim 13, wherein a forming of junctions of the high and low density impurity areas together with an oxidation of the exposed surface portion of the conduction layer to form a gate pole having a vertical side profile are made by the annealing process under an oxidation process atmosphere.
Claim 23
Dependent Claim
52 words
The method as claimed in claim 13, wherein a forming of junctions of the source and the drain together with an oxidation of the exposed surface portion of the conduction layer to form a gate pole having a vertical side profile are made by the annealing process under an oxidation process atmosphere.
References Cited (Backward Citations)
US5071777A
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JPH02262321A
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US5100815A
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JPH0448640A
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US5100820A
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JPH05152427A
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