US5426076A
Expired / Lapsed
US
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Dielectric deposition and cleaning process for improved gap filling and device planarization
Assignee: Intel Corp
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Filing: 1993-07-08
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Granted: 1995-06-20
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Expires: 2013-07-08
Abstract
Abstract A method of forming a silicon dioxide layer (SiO 2 ) on a semiconductor substrate which fills gaps between surface features by means of applying, cleaning, and etching a series of layers of silicon dioxide. A layer of SiO 2 is deposited by plasma enhanced chemical vapor deposition of tetraethyl orthosilicate; and a second layer of SiO 2 is deposited thereon by thermal chemical vapor deposition. A series of etches are performed, removing the second layer of SiO 2 from all regions of the substrates except the gaps. A third layer of SiO 2 , formed by plasma enhanced chemical vapor deposition, is then deposited. An additional etch step further planarizes the surface of the substrate.
Inventors
- 👤 Farhad K. Moghadam
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-01 22:50
CPC Classifications
B; B81; B81C; B81C1/00; B81C1/00015; B81C1/00214; H; H10; H10P; H10P95/00; H10P95/06; H10W; H10W20/00; H10W20/01; H10W20/071; H10W20/098; Y; Y10; Y10S; Y10S438/00; Y10S438/913
Claims Analysis
Total Claims: 31
Claim 1
Independent Claim
103 words
A process for forming a dielectric layer on a semiconductor surface, said surface having structures formed thereon, said structures having gaps formed therebetween, said process comprising the steps of: depositing a first layer of silicon dioxide by PECVD TEOS; depositing a second layer of silicon dioxide by THCVD TEOS; etching said second layer of silicon dioxide from all regions of said dielectric layer in which openings are to be formed while leaving at least some of said second layer in said gaps to form an etched surface; and depositing a third layer of silicon dioxide formed by PECVD TEOS on said etched surface.
Claim 2
Dependent Claim
103 words
A process for forming a dielectric layer on a semiconductor surface, said surface having structures formed thereon, said structures having gaps formed therebetween, said process comprising the steps of: depositing a first layer of silicon dioxide by PECVD TEOS; depositing a second layer of silicon dioxide by THCVD TEOS; etching said second layer of silicon dioxide from all regions of said dielectric layer in which openings are to be formed while leaving at least some of said second layer in said gaps to form an etched surface; and depositing a third layer of silicon dioxide formed by PECVD TEOS on said etched surface.
Claim 3
Dependent Claim
28 words
The process of claim 1 further comprising the step of performing a plasma dean on said first layer of SiO 2 before said deposition of said second layer.
Claim 4
Dependent Claim
37 words
The process of claim 2 wherein said plasma clean is performed by flowing 50-70 standard cubic centimeters per minute of oxygen into a reaction chamber having a plasma generating rf source powered at 200 to 250 watts.
Claim 5
Dependent Claim
51 words
The process of claim 1 wherein the thickness of said first layer of silicon dioxide is 0.3-0.5 μm, the thickness of said second layer of silicon dioxide is in the range of 0.4-0.6 μm, and the thickness of said third layer of silicon dioxide is in the range of 0.3-0.5 μm.
Claim 6
Dependent Claim
20 words
The process of claim 1 wherein said etch step etches from 0.4 μm to 0.8 μm of SiO 2 .
Claim 7
Dependent Claim
40 words
The process of claim 1 wherein said etch step is performed using a first etch using a gas mixture comprising oxygen gas and carbon tetraflouride gas, and a second etch using a gas mixture comprising carbon tetraflouride and argon gas.
Claim 8
Dependent Claim
75 words
The process of claim 6 wherein said first etch is performed at a pressure of 0.3-0.5 torr, at a power of 500-600 watts, with an oxygen flow rate of 40-60 SCCM and a carbon tetraflouride flow rate of 80-120 SCCM, and said second etch is performed at a pressure of 0.03-0.04 torr, at a power of 400-450 watts, with an argon flow rate of 40-60 SCCM and a carbon tetraflouride flow rate of 5-15 SCCM.
Claim 9
Dependent Claim
53 words
The process of claim 1 wherein said third layer of SiO 2 is deposited to a thickness exceeding 0.3 μm and said process further comprises the step of performing an etch on said third layer such that the thickness of said third layer after said etch is in the range of 0.3-0.6 μm.
Claim 10
Dependent Claim
52 words
The process of claim 8 wherein said third layer is etched using a gas mixture comprising oxygen gas and carbon tetraflouride gas at a pressure of 0.3-0.5 torr, and at a power of 500-600 watts, with an oxygen flow rate of 40-60 SCCM, and a carbon tetraflouride flow rate of 80-120 SCCM.
Claim 11
Dependent Claim
30 words
The process of claim 1 wherein said third layer of SiO 2 is deposited to a thickness of approximately 1.0-2.0 μm and wherein said etch step etches from 0.35-1.35 μm.
Claim 12
Dependent Claim
32 words
The process of claim 1 wherein all of said process steps are performed sequentially within the same reaction chamber, said semiconductor wafer not being removed from said reaction chamber between process steps.
Claim 13
Dependent Claim
43 words
In a process for depositing silicon dioxide on a semiconductor substrate, said process having at least one deposition of silicon dioxide formed by PECVD TEOS, an improvement comprising a plasma clean step after deposition of said SiO 2 layer formed by PECVD TEOS.
Claim 14
Dependent Claim
43 words
In a process for depositing silicon dioxide on a semiconductor substrate, said process having at least one deposition of silicon dioxide formed by PECVD TEOS, an improvement comprising a plasma clean step after deposition of said SiO 2 layer formed by PECVD TEOS.
Claim 15
Dependent Claim
16 words
The process of claim 12 wherein said plasma clean is performed using a gas comprising oxygen.
Claim 16
Dependent Claim
16 words
The process of claim 12 wherein said plasma clean is performed using a gas comprising argon.
Claim 17
Dependent Claim
16 words
The process of claim 12 wherein said plasma clean is performed using a gas comprising nitrogen.
Claim 18
Dependent Claim
52 words
The process of claim 13 wherein the flow of said oxygen is 50-60 SCCM and said plasma clean is performed using a spacing between the susceptor and the rf-induction source of 800-900 mils, a power of less than 250 watts, and at a pressure of less than or equal to 1 torr.
Claim 19
Dependent Claim
30 words
The process of claim 12 wherein said plasma clean step is performed prior to the deposition of a second layer of SiO 2 deposited by chemical vapor deposition of TEOS.
Claim 20
Dependent Claim
36 words
The process of claim 12 wherein all of said process steps are performed sequentially within the same reaction chamber, said semiconductor substrate not being removed from said reaction chamber between said chemical vapor deposition process steps.
Claim 21
Dependent Claim
81 words
A process for forming a dielectric layer on a semiconductor substrate, said substrate having structures formed thereon, said structures having gaps formed therebetween, said process comprising the steps of: depositing a first layer of silicon dioxide by PECVD TEOS; depositing a second layer of silicon dioxide by THCVD TEOS; etching said second layer of silicon dioxide from all areas of said semiconductor substrate except said gaps; depositing a third layer of silicon dioxide foraged by PECVD TEOS on said etched surface.
Claim 22
Dependent Claim
81 words
A process for forming a dielectric layer on a semiconductor substrate, said substrate having structures formed thereon, said structures having gaps formed therebetween, said process comprising the steps of: depositing a first layer of silicon dioxide by PECVD TEOS; depositing a second layer of silicon dioxide by THCVD TEOS; etching said second layer of silicon dioxide from all areas of said semiconductor substrate except said gaps; depositing a third layer of silicon dioxide foraged by PECVD TEOS on said etched surface.
Claim 23
Dependent Claim
28 words
The process of claim 19 further comprising the step of performing a plasma clean on said first layer of SiO 2 before said deposition of said second layer.
Claim 24
Dependent Claim
37 words
The process of claim 20 wherein said plasma clean is performed by flowing 50-70 standard cubic centimeters per minute of oxygen into a reaction chamber having a plasma generating rf source powered at 200 to 250 watts.
Claim 25
Dependent Claim
51 words
The process of claim 19 wherein the thickness of said first layer of silicon dioxide is 0.3-0.5 μm, the thickness of said second layer of silicon dioxide is in the range of 0.4-0.6 μm, and the thickness of said third layer of silicon dioxide is in the range of 0.3-0.5 μm.
Claim 26
Dependent Claim
40 words
The process of claim 19 wherein said etch step is performed using a first etch using a gas mixture comprising oxygen gas and carbon tetraflouride gas, and a second etch using a gas mixture comprising carbon tetraflouride and argon gas.
Claim 27
Dependent Claim
74 words
The process of claim 23 wherein said first etch is performed at a pressure of 0.3-0.5 torr, at a power of 500-600 watts, with an oxygen flow rate of 40-60 SCCM and a carbon tetraflouride flow rate of 80-120 SCCM, said second etch is performed at a pressure of 0.03-0.04 torr, at a power of 400-450 watts, with an argon flow rate of 40-60 SCCM and a carbon tetraflouride flow rate of 5-15 SCCM.
Claim 28
Dependent Claim
53 words
The process of claim 19 wherein said third layer of SiO 2 is deposited to a thickness exceeding 0.3 μm and said process further comprises the step of performing an etch on said third layer such that the thickness of said third layer after said etch is in the range of 0.3-0.6 μm.
Claim 29
Dependent Claim
27 words
The process of claim 25 wherein said third layer is etched by performing a plasma etch using a gas mixture comprising oxygen gas and carbon tetraflouride gas.
Claim 30
Dependent Claim
35 words
The process of claim 26 wherein said etch uses a pressure of 0.3-0.5 torr, a power of 500-600 watts, an oxygen flow rate of 40-60 SCCM and a carbon tetraflouride flow rate of 80-120 SCCM.
Claim 31
Dependent Claim
32 words
The process of claim 19 wherein all of said process steps are performed sequentially within the same reaction chamber, said semiconductor wafer not being removed from said reaction chamber between process steps.
References Cited (Backward Citations)
JPS60109248A
Cited
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| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
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| 3.5 Years (Year 4) | 1998-06-19 | 1998-12-19 | 1999-06-20 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2002-06-19 | 2002-12-19 | 2003-06-20 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2006-06-19 | 2006-12-19 | 2007-06-20 | $7700.00 | Window Closed / Lapsed |