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JPS60109248A Expired / Lapsed JP ⏱️ 0.0 years remaining

Semiconductor ic device and manufacture thereof

Assignee: Hitachi Ltd
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Filing: 1983-11-18
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Granted: —
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Expires: 2003-11-18
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Abstract

Abstract PURPOSE:To enable the secure prevention of the generation of defects such as swelling on a wiring of the upper layer by a method wherein at least the surface of an interlayer insulation film is formed of a plasma oxide film. CONSTITUTION:The oxide insulation film 12 of the first layer is formed on the surface of an Si semiconductor substrate 10 where diffused layers n<->, p, and n<+> forming the element regions have been selectively formed, and a through hole TH for electrode lead-out is bored in this insulation film. An aluminum wiring 14 of the first layer is formed by aluminum deposition and patterning-etching, and then the interlayer insulation film 22 is formed. The insulation film consists of three layers of P.SiO 16/SOG 18/P.SiO 20. The through hole TH to connect the wirings 14 and 16 of the upper and lower layers is bored in this insulation film. Argon ions are bombarded over the whole from above in order to clean the exposed surface 14a of the aluminum wiring 14 exposed from below the TH. That is, ion sputter etching is performed.

Inventors

  • 👤 Hiroshi Ikeda
  • 👤 洋 池田
  • 👤 Tokio Kato
  • 👤 加藤 登季男

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-09 00:03
CPC Classifications
—

Claims Analysis

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References Cited (Backward Citations)

JPS57170550A Cited
JPS5816545A Cited

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