Patent US5420079A successfully refreshed from Google Patents.
← Back to Patent Explorer
US5420079A Expired / Lapsed US ⏱️ 0.0 years remaining

Process for producing semiconductor device comprising two step annealing treatment

Assignee: Sharp Corp
•
Filing: 1992-11-20
•
Granted: 1995-05-30
•
Expires: 2012-11-20
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract The disclosed invention is a process for fabricating a semiconductor device comprising the steps of: forming a gate electrode; covering the gate electrode and surface of the substrate with a layer of silicon dioxide; etching the silicon dioxide layer using an RIE method and an HF etching method to form a sidewall of silicon dioxide against each side of the gate electrode; injecting ions into the substrate at an acceleration energy within the range of about 10-20 KeV to minimize crystalline defects in the substrate caused by ion injection; heating the entire substrate in two successive stages: (a) initially at a first temperature within the range of 700°-850° C. for approximately one hour to recover the crystallinity of the substrate damaged in the injecting step and to inhibit diffusion of impurities; and (b) then at a second temperature within the range of 900°-1100° C. for 5-15 seconds to form a shallow depth diffusion region in the substrate.

Inventors

  • 👤 Shigeo Onishi
  • 👤 Akitsu Ayukawa
  • 👤 Kenichi Tanaka

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-09 08:41
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/01; H10D30/021; H10D30/0223; H10P; H10P30/00; H10P30/20; H10P30/202; H10P30/204; H10P30/21; H10P30/212; H10P30/225; H10P30/28; Y; Y10; Y10S; Y10S148/00; Y10S148/003

Claims Analysis

Total Claims: 16
Claim 1
Independent Claim 186 words
A method for making an integrated circuit structure containing a semiconductor silicon substrate including at least one gate electrode formed thereon through the intermediary of a silicon dioxide film, comprising: covering the gate electrode and surface of the substrate with a layer of silicon dioxide; etching the silicon dioxide layer using an RIE method and an HF etching method to form a sidewall of silicon dioxide against each side of the gate electrode; injecting ions into the substrate at an acceleration energy sufficiently low to minimize crystalline defects in the substrate caused by ion injection; heating the entire substrate in two successive stages: (a) initially at a first temperature for a first time period sufficient to recover the crystallinity of the substrate damaged in the injecting step and to inhibit diffusion of impurities; and (b) then at a second temperature higher than the first temperature for a second time period shorter than the first time period by at least an order of magnitude, the second temperature being sufficiently high and the second time being suffiently short to form a shallow depth diffusion region in the substrate.
Claim 2
Independent Claim 186 words
A method for making an integrated circuit structure containing a semiconductor silicon substrate including at least one gate electrode formed thereon through the intermediary of a silicon dioxide film, comprising: covering the gate electrode and surface of the substrate with a layer of silicon dioxide; etching the silicon dioxide layer using an RIE method and an HF etching method to form a sidewall of silicon dioxide against each side of the gate electrode; injecting ions into the substrate at an acceleration energy sufficiently low to minimize crystalline defects in the substrate caused by ion injection; heating the entire substrate in two successive stages: (a) initially at a first temperature for a first time period sufficient to recover the crystallinity of the substrate damaged in the injecting step and to inhibit diffusion of impurities; and (b) then at a second temperature higher than the first temperature for a second time period shorter than the first time period by at least an order of magnitude, the second temperature being sufficiently high and the second time being suffiently short to form a shallow depth diffusion region in the substrate.
Claim 3
Dependent Claim 28 words
The method in claim 1, wherein the first temperature is within the range of 700° C. to 850° C. and the first time period is approximately one hour.
Claim 4
Dependent Claim 33 words
The method in claim 1, wherein the second temperature is within the range of 900° C. to 1100° C. and the second time period is within the range of five to fifteen seconds.
Claim 5
Dependent Claim 32 words
The method in claim 1, wherein the ion injection is conducted at an acceleration energy level of about 20 KeV and a dosage of about 2 to 5×10 15 cm -2 .
Claim 6
Independent Claim 143 words
A method for making an integrated circuit structure containing a semiconductor silicon substrate including at least one gate electrode formed thereon through the intermediary of a silicon dioxide film, comprising the steps of: covering the gate electrode and surface of the substrate with a layer of silicon dioxide; etching the silicon dioxide layer; injecting ions into the substrate at an acceleration energy level within the range of about 10 to 20 KeV in order to minimize crystalline defects in the substrate caused by ion injection; heating the entire substrate in successive stages: (a) initially at a first temperature for a time period to recover the crystallinity of the substrate damaged in the injecting step and to inhibit diffusion of impurities; and (b) then at a second temperature higher than the first temperature for a second time period shorter than the first time period.
Claim 7
Independent Claim 143 words
A method for making an integrated circuit structure containing a semiconductor silicon substrate including at least one gate electrode formed thereon through the intermediary of a silicon dioxide film, comprising the steps of: covering the gate electrode and surface of the substrate with a layer of silicon dioxide; etching the silicon dioxide layer; injecting ions into the substrate at an acceleration energy level within the range of about 10 to 20 KeV in order to minimize crystalline defects in the substrate caused by ion injection; heating the entire substrate in successive stages: (a) initially at a first temperature for a time period to recover the crystallinity of the substrate damaged in the injecting step and to inhibit diffusion of impurities; and (b) then at a second temperature higher than the first temperature for a second time period shorter than the first time period.
Claim 8
Dependent Claim 32 words
The method in claim 5 wherein the etching step includes using an RIE method and an HF method to form a sidewall of silicon dioxide against each side of the gate electrode.
Claim 9
Dependent Claim 28 words
The method in claim 5 wherein the first temperature is within the range of 700° C. to 850° C. and the first time period is approximately one hour.
Claim 10
Dependent Claim 33 words
The method in claim 5 wherein the second temperature is within the range of 900° C. to 1100° C. and the second time period is within the range of five to fifteen seconds.
Claim 11
Dependent Claim 23 words
The method in claim 5 wherein the ion injection is conducted at a dosage of about 2 to 5×10 15 cm -2 .
Claim 12
Independent Claim 140 words
A method for making an integrated circuit structure containing a semiconductor silicon substrate including at least one gate electrode formed thereon through the intermediary of a silicon dioxide film, comprising: covering the gate electrode and surface of the substrate with a layer of silicon dioxide; etching the silicon dioxide layer; injecting ions into the substrate at a low acceleration energy to minimize crystalline defects in the substrate caused by ion injection; heating the entire substrate in successive stages: (a) initially at a first temperature substantially within the range of about 700° C. to 850° C. for approximately one hour to recover the crystallinity of the substrate damaged in the injecting step and to inhibit diffusion of impurities; and (b) then at a second temperature higher than the first temperature for a second time period shorter than the first time period.
Claim 13
Independent Claim 140 words
A method for making an integrated circuit structure containing a semiconductor silicon substrate including at least one gate electrode formed thereon through the intermediary of a silicon dioxide film, comprising: covering the gate electrode and surface of the substrate with a layer of silicon dioxide; etching the silicon dioxide layer; injecting ions into the substrate at a low acceleration energy to minimize crystalline defects in the substrate caused by ion injection; heating the entire substrate in successive stages: (a) initially at a first temperature substantially within the range of about 700° C. to 850° C. for approximately one hour to recover the crystallinity of the substrate damaged in the injecting step and to inhibit diffusion of impurities; and (b) then at a second temperature higher than the first temperature for a second time period shorter than the first time period.
Claim 14
Dependent Claim 32 words
The method in claim 10 wherein the etching step includes using an RIE method and an HF method to form a sidewall of silicon dioxide against each side of the gate electrode.
Claim 15
Dependent Claim 33 words
The method in claim 10 wherein the second temperature is within the range of 900° C. to 1100° C. and the second time period is within the range of five to fifteen seconds.
Claim 16
Dependent Claim 34 words
The method in claim 10 wherein the ion injection is conducted at an acceleration energy level of about 10 to 20 KeV and a dosage of about 2 to 5×10 15 cm -2 .

References Cited (Backward Citations)

US4818714A Cited
US5015595A Cited
US5217912A Cited
US5183770A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1998-05-29 1998-11-28 1999-05-30 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2002-05-29 2002-11-28 2003-05-30 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2006-05-29 2006-11-28 2007-05-30 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag