Instruction operation size optimization

Claim 2

In a computer system comprising a plurality of instructions having multiple instruction operation sizes, and a source program to be compiled, an automated method implemented on said computer system for optimizing the instruction operation sizes to be used for said instructions, when generating said instructions for said source program while compiling said source program on said computer system, said automated method comprising the steps of: a) assigning a plurality of initial instruction ordinals representative of said instruction operation sizes to said instructions, upon generating said instructions for said source program being compiled, said assignment being made based on a set of predetermined initial instruction ordinal assignment policies, said predetermined assignment policies embodying logic for assigning initial instruction ordinals that are representative of minimal instruction operation sizes of said generated instructions, without regard to said assigned instruction ordinals' compatibility with one another; b) iteratively adjusting said instruction ordinal assignments until said assigned instruction ordinals converge into a set of assigned instruction ordinals compatible with one another, said iterative assignment adjustment being made based on a set of predetermined instruction ordinal assignment adjust policies, said predetermined assignment adjustment policies embodying logic for avoiding unnecessary assignment adjustments to instruction ordinals representative of the larger instruction operation sizes; and c) mapping said compatible instruction ordinals assigned to represented instruction operation sizes, conditionally inserting additional instructions to the generated instructions if necessary, based on a set of predetermined mapping policies, said predetermined mapping policies embodying logic for identifying the instruction operation sizes represented by the instruction ordinals and the necessary instruction insertions.

Claim 3

The automated method as set forth in claim 1, wherein said step b) comprises the steps of: b.0) performing data flow analysis on said generated instructions to identify all data flow related instructions requiring propagation of their assigned instruction ordinals to their data flow related instructions to achieve instruction ordinal compatibility; b.1) deriving a first-in-first-out instruction ordinal propagation list based on the results of said data flow analysis, said propagation list comprising a plurality of instruction ordinal and propagation target pairs, each pair identifying an instruction ordinal to be propagated and an instruction that is the immediate target of the particular propagation; b.2) removing the frontmost instruction ordinal and propagation target pair from said propagation list; b.3) conditionally adjusting the current instruction ordinal assignment of the propagation target instruction based on said predetermined assignment adjustment policies; b.4) adding one or more instruction ordinal and propagation target instruction pairs to the front of said propagation list if an assignment adjustment is made in said step b.3), said addition being made based on said newly adjusted instruction ordinal assignment of said propagation target instruction and the immediate data flow related instructions of said propagation target instruction; and b.5) repeating said steps b.2) through b.4) until said propagation list is empty.

Claim 4

The automated method as set forth in claim 1, wherein, said steps (a) through (c) are performed using instruction ordinals including, in ascending order, instruction ordinals BYTEsize, SIGNBsize, BYTE -- plus -- size, HWsize, SIGNHsize, ZEROSsize, HW -- plus -- size, ZEROXsize, SIGNXsize and WDsize representing an unsigned byte instruction operation size, a signed byte instruction operation size, a greater than 8-bit result from 8-bit operands instruction operation size, an unsigned short instruction operation size, a signed short instruction operation size, a signed short that can be used as unsigned short instruction operation size, a greater than 16-bit result from 16-bit operand instruction operation size, a zero extend before 32-bit operation instruction operation size, a sign extend before 32-bit operation instruction operation size, and a 32-bit instruction operation size respectively.

Claim 5

The automated method as set forth in claim 3, wherein, said step (a) through (c) are performed on instructions having instruction types including a Byte load sign extend instruction type; said step (a) is performed with initial assignment policies embodying logic that assigns said SIGNBsize instruction ordinal to an instruction of said Byte load sign extend instruction type as its initial instruction ordinal assignment; said step (b) is performed with assignment adjustment policies embodying logic that adjusts the current instruction ordinal assignment (i -- size) of an instruction of said Byte load sign extend instruction type, that is the immediate target of an instruction ordinal being propagated (p -- size), as follows: if (p -- size>BYTE -- plus -- size) i -- size=SIGNXsize; and said step (c) is performed with mapping policies embodying logic that maps the assigned instruction ordinal of an instruction of said Byte load sign extend instruction type and conditionally inserting one or more instructions as follows: ______________________________________ instruction operation size = a byte, if (i.sub.-- size) > BYTE.sub.-- plus.sub.-- size), add code to sign-extend an 8-bit register of the Byte load sign extend instruction to a 32-bit register. ______________________________________

Claim 6

The automated method as set forth in claim 3, wherein, said steps (a) through (c) are performed on instructions having instruction types including a Byte load zero extend instruction type; said step (a) is performed with initial assignment policies embodying logic that assigns said BYTEsize instruction ordinal to an instruction of said Byte load zero extend instruction type as its initial instruction ordinal assignment; said step (b) is performed with assignment adjustment policies embodying logic that adjusts the current instruction ordinal assignment (i -- size) of an instruction of said Byte load zero extend instruction type, that is the immediate target of an instruction ordinal being propagated (p -- size), as follows: if (p -- size=SIGNBsize) i -- size=ZEROXsize, if (p -- size>BYTE -- plus -- size) i -- size=ZEROXsize; and said step (c) is performed with mapping policies embodying logic that maps the assigned instruction ordinal of an instruction of said Byte load zero extend instruction type and conditionally inserting one or more instructions as follows: ______________________________________ instruction operation size = a byte, if (i.sub.-- size > BYTE.sub.-- plus.sub.-- size) add code to clear a register of the Byte load zero extend instruction. ______________________________________

Claim 7

The automated method as set forth in claim 1, wherein, said steps (a) through (c) are performed on instructions having instruction types including a 16-bit load sign extend instruction type; said step (a) is performed with initial assignment policies embodying logic that assigns said SIGNHsize to an instruction of said 16-bit load sign extend instruction type as its initial instruction ordinal; said step (b) is performed with assignment adjustment policies embodying logic that adjusts the current instruction ordinal assignment (i -- size) of an instruction of said 16-bit load sign extend instruction type, that is the immediate target of an instruction ordinal being propagated (p -- size), as follows: if (p -- size=ZEROSsize) i -- size=ZEROSsize, else if (p -- size>HW -- plus -- size) i -- size=SIGNXsize; and said step (c) is performed with mapping policies embodying logic that maps the assigned instruction ordinal of an instruction of said 16-bit load sign extend instruction type and conditionally inserting one or more instructions as follows: ______________________________________ if (i.sub.-- size = ZEROSsize) instruction operation size = a word, add code to clear a result register of the instruction of said 16-bit load sign extend instruction type, load 16 bits into a right half of said result register, else instruction operation size = half of a word if (i.sub.-- size > HW.sub.-- plus.sub.-- size) add code to sign extend a 16-bit register of the instruction of said 16-bit load sign extend instruction type to a 32-bit register. ______________________________________

Claim 8

The automated method as set forth in claim 3, wherein, said steps (a) through (c) are performed on instructions having instruction types including a 16-bit load zero extend instruction type; said step (a) is performed with initial assignment policies embodying logic that assigns said HWsize to an instruction of said 16-bit load zero extend instruction type as its initial instruction ordinal; said step (b) is performed with assignment adjustment policies embodying logic that adjusts the current instruction ordinal assignment (i -- size) of an instruction of said 16-bit load zero extend instruction type, that is the immediate target of an instruction ordinal being propagated (p -- size), as follows: if (p -- size=SIGNHsize) i -- size=ZEROXsize, if (p -- size=ZEROSsize) i -- size=ZEROXsize, if (p -- size>HW -- plus -- size) i -- size=ZEROXsize; and said step (c) is performed with mapping policies embodying logic that maps the assigned instruction ordinal of an instruction of said 16-bit load zero extend instruction type and conditionally inserting one or more instructions as follows: ______________________________________ if (i.sub.-- size <= HW.sub.-- plus.sub.-- size) instruction operation size = half of a word, else instruction operation size = a word, add code to clear a result register of the instruction of said 16-bit load zero extend instruction type, load 16 bits into a right half of said result register. ______________________________________

Claim 9

The automated method as set forth in claim 3, wherein, said steps (a) through (c) are performed on instructions having instruction types including a non-Byte and non-16-bit load instruction type; said step (a) is performed with initial assignment policies embodying logic that assigns said WDsize to an instruction of said non-Byte and non-16-bit load instruction type as its initial instruction ordinal; said step (b) is performed with assignment adjustment policies embodying logic that adjusts the current instruction ordinal assignment (i -- size) of an instruction of said non-Byte and non-16-bit load instruction type, that is the immediate target of an instruction ordinal being propagated (p -- size), as follows: if (p -- size>i -- size) i -- size=p -- size; and said step (c) is performed with mapping policies embodying logic that maps the assigned instruction ordinal of an instruction of said non-byte and non 16-bit load zero extend instruction type and conditionally inserting one or more instructions as follows: instruction operation size=original load size.

Claim 10

The automated method as set forth in claim 3, wherein, said steps (a) through (c) are performed on instructions having instruction types including a STORE instruction type, said STORE instruction type comprising STORE instructions for storing data, each of said data being stored having a data size of a selected one of said BYTEsize, HWsize and WDsize; said step (a) is performed with initial assignment policies embodying logic that assigns the size of the data being stored by an instruction of said STORE instruction type as its initial instruction ordinal; said step (b) is performed with assignment adjustment policies embodying logic that does not adjust the current instruction ordinal assignment of an instruction of said STORE instruction type, that is the immediate target of an instruction ordinal being propagated; and said step (c) is performed with mapping policies embodying logic that maps the assigned instruction ordinal of an instruction of said STORE instruction type and conditionally inserting one or more instructions as follows: instruction operation size=original store size.

Claim 11

The automated method as set forth in claim 3, wherein, said steps (a) through (c) are performed on instructions having instruction types including a sign extend convert instruction type, said sign extend convert instruction type comprising instructions for converting data to a selected one of said SIGNHsize and SIGNBsize; said step (a) is performed with initial assignment policies embodying logic that assigns the size of the data being converted by an instruction of said sign extend convert instruction type as its initial instruction ordinal; said step (b) is performed with assignment adjustment policies embodying logic that adjusts the current instruction ordinal assignment (i -- size) an instruction of said sign extend convert instruction type, that is the immediate target of an instruction ordinal being propagated (p -- size), as follows: if (p -- size>i -- size) i -- size=p -- size; and said step (c) is performed with mapping policies embodying logic that maps the assigned instruction ordinal of an instruction of said sign extend convert instruction type and conditionally inserting one or more instructions as follows: ______________________________________ instruction operation size = one word; if (i.sub.-- size = ZEROSsize) treat said instruction of the sign extend convert instruction type as an instruction of a zero extend convert type, if (i.sub.-- size <= HW.sub.-- plus.sub.-- size and 16 bit extend and size(operand) <= HW.sub.-- plus.sub.-- size) delete the instruction of said sign extend convert instruction type, if (i.sub.-- size <= BYTE.sub.-- plus.sub.-- size and 24 bit extend and size(operand) <= BYTE.sub.-- plus.sub.-- size) delete the instruction of said sign extend convert instruction type. ______________________________________

Claim 12

The automated method as set forth in claim 3, wherein, said steps (a) through (c) are performed on instructions having instruction types including a zero extend convert instruction type, said zero extend convert instruction type comprising instructions for converting data to a selected one of said BYTEsize and HWsize; said step (a) is performed with initial assignment policies embodying logic that assigns the size of the data being converted by an instruction of said zero extend convert instruction type as its initial instruction ordinal; said step (b) is performed with assignment adjustment policies embodying logic that adjusts the current instruction ordinal assignment (i -- size) an instruction of said zero extend convert instruction type, that is the immediate target of an instruction ordinal being propagated (p -- size), as follows: if (p -- size>i -- size) i -- size=p -- size; and said step (c) is performed with mapping policies embodying logic that maps the assigned instruction ordinal of an instruction of said zero extend convert instruction type and conditionally inserting one or more instructions as follows: ______________________________________ instruction operation size = one word; if (i.sub.-- size <= HW.sub.-- plus.sub.-- size and 16 bit extend and size(operand) <= HW.sub.-- plus.sub.-- size) delete the instruction of said zero extend convert instruction type, if(i.sub.-- size <= BYTE.sub.-- plus.sub.-- size and 24 bit extend and size(operand) <= BYTE.sub.-- plus.sub.-- size) delete the instruction of said zero extend convert instruction type. ______________________________________

Claim 13

The automated method as set forth in claim 3, wherein, said steps (a) through (c) are performed on instructions having instruction types including an enter constant instruction type, said enter constant instruction type comprising instructions for entering constants; said step (a) is performed with initial assignment policies embodying logic that assigns the initial instruction ordinal of an instruction of said enter constant instruction type as follows: WDsize, if (-8000≦n≦7fff) then SIGNHsize, if (0≦n≦7fff) then HWsize, if (-80≦n≦7f) the SIGNBsize, if (0≦n≦7f) then BYTEsize, where n is said constant's value; said step (b) is performed with assignment adjustment policies embodying logic that adjusts the current instruction ordinal assignment (i -- size) an instruction of said enter constant instruction type, that is the immediate target of an instruction ordinal being propagated (p -- size), as follows: if (p -- size>WDsize) i -- size=p -- size, if (-8000≦n≦7fff and p -- size=ZEROSsize) i -- size=p -- size, if (-8000≦n≦7fff and p -- size>HW -- plus -- size) i -- size=p -- size, if (-80≦n≦7f and p -- size>BYTE -- plus -- size) i -- size=p -- size; and said step (c) is performed with mapping policies embodying logic that maps the assigned instruction ordinal of an instruction of said enter constant instruction type and conditionally inserting one or more instructions as follows: ______________________________________ instruction operation size = a word, if (i.sub.-- size <= BYTE.sub.-- plus.sub.-- size) instruction operation size = a byte. else if (i.sub.-- size = ZEROSsize) constant = constant and Oxff ______________________________________

Claim 14

The automated method as set forth in claim 3, wherein, said steps (a) through (c) are performed on instructions having instruction types including a first comparison instruction type (Compare-eq, ne); said step (a) is performed with initial assignment policies embodying logic that does not assign an initial instruction ordinal to an instruction of said first comparison instruction type; said step (b) is performed with assignment adjustment policies embodying logic that adjusts the current instruction ordinal assignment (i -- size) an instruction of said first comparison instruction type, that is the immediate target of an instruction ordinal being propagated (p -- size), as follows: ______________________________________ if (p.sub.-- size > i.sub.-- size) { i.sub.-- size = p.sub.-- size, if (p.sub.-- size = HWsize) i.sub.-- size = ZEROXsize, if (p.sub.-- size = SIGNHsize) i.sub.-- size = ZEROSsize, if (p.sub.-- size = HW.sub.-- plus.sub.-- size or p.sub.-- size = BYTE.sub.-- plus.sub.-- size) i.sub.-- size = SIGNXsize; and ______________________________________ said step (c) is performed with mapping policies embodying logic that maps the assigned instruction ordinal of an instruction of said first comparison instruction type and conditionally inserting one or more instructions as follows: ______________________________________ instruction operation size = a word, if (i.sub.-- size <= BYTE.sub.-- plus.sub.-- size) instruction operation size = a byte. ______________________________________

Claim 15

The automated method as set forth in claim 3, wherein, said steps (a) through (c) are performed on instructions having instruction types including a second comparison instruction type (Compare-gt, ge, lt, le); said step (a) is performed with initial assignment policies embodying logic that does not assign an initial instruction ordinal to an instruction of said second comparison instruction type; said step (b) is performed with assignment adjustment policies embodying logic that adjusts the current instruction ordinal assignment (i -- size) an instruction of said second comparison instruction type that is the immediate target of an instruction ordinal being propagated (p -- size), as follows: ______________________________________ if (p.sub.-- size > i.sub.-- size and p.sub.-- size i = ZEROSsize) { i.sub.-- size = p.sub.-- size, if (i.sub.-- size = HWsize) i.sub.-- size = ZEROXsize, if (p.sub.-- size = HW.sub.-- plus.sub.-- size or p.sub.-- size = BYTE.sub.-- plus.sub.-- size) i.sub.-- size = SIGNXsize; and ______________________________________ said step (c) is performed with mapping policies embodying logic that maps the assigned instruction ordinal of an instruction of said second comparison instruction type and conditionally inserting one or more instructions as follows: ______________________________________ instruction operation size = a word, if (i.sub.-- size = HW.sub.-- size or i.sub.-- size = SIGNHsize) add code to shift operands of the instruction of said second comparison instruction type 16 bits with zero fill, else if (i.sub.-- size < BYTE.sub.-- plus.sub.-- size) instruction operation size = a byte. ______________________________________

Claim 16

The automated method as set forth in claim 3, wherein, said steps (a) through (c) are performed on instructions having instruction types including a move instruction type; said step (a) is performed with initial assignment policies embodying logic that does not assign an initial instruction ordinal to an instruction of said move instruction type; said step (b) is performed with assignment adjustment policies embodying logic that adjusts the current instruction ordinal assignment (i -- size) an instruction of said move type that is the immediate target of an instruction ordinal being propagated (p -- size), as follows: if (p -- size>i -- size) i -- size=p -- size; and said step (c) is performed with mapping policies embodying logic that maps the assigned instruction ordinal of an instruction of said move instruction type and conditionally inserting one or more instructions as follows: ______________________________________ instruction operation size = a word, if (i.sub.-- size =<BYTE.sub.-- plus.sub.-- size) instruction operation size = a byte. ______________________________________

Claim 17

A computer system comprising: I) execution means for executing compiled programs comprising instructions that have multiple instruction operation sizes; and II) optimizer means executed by said execution means, said optimizer means being equipped to optimize instruction operation sizes of said instructions when said instructions are being generated while a source program is being compiled, said optimizer means including a) a set of predetermined initial instruction ordinal assignment policies for governing initial assignment of instruction ordinals representative of instruction operation sizes to said instructions, said predetermined assignment policies embodying logic that assigns initial instruction ordinals which are representative of minimal instruction operation sizes of said instructions, without regard to the assigned instruction ordinals' compatibility with one another; b) assignment means for assigning a plurality of initial instruction ordinals to said instructions, upon generating said instruction for said source program being compiled, said assignment being made based on said set of predetermined initial instruction ordinal assignment policies; c) a set of predetermined instruction ordinal assignment adjustment policies for governing assignment adjustment of said assigned instruction ordinals, said predetermined assignment adjustment policies embodying logic that avoids unnecessary assignment adjustments to instruction ordinals representative of the larger instruction operation sizes; d) adjustment means for iteratively adjusting said instruction ordinal assignments until said instruction ordinal assignments converge into a set of assigned instruction ordinals compatible with one another, said iterative assignment adjustment being made based on said set of predetermined instruction ordinal assignment adjustment policies; e) a set of predetermined instruction ordinal mapping policies for governing mapping of assigned instruction ordinals to represented instruction operation sizes, said predetermined mapping policies embodying logic that identifies the instruction operation sizes represented by the instruction ordinals and necessary instruction insertions; and f) mapping means for mapping said compatible instruction ordinals to represented instruction operation sizes, and conditionally inserting additional instructions to the generated instructions if necessary, based on said set of predetermined mapping policies.

Claim 18

A computer system comprising: I) execution means for executing compiled programs comprising instructions that have multiple instruction operation sizes; and II) optimizer means executed by said execution means, said optimizer means being equipped to optimize instruction operation sizes of said instructions when said instructions are being generated while a source program is being compiled, said optimizer means including a) a set of predetermined initial instruction ordinal assignment policies for governing initial assignment of instruction ordinals representative of instruction operation sizes to said instructions, said predetermined assignment policies embodying logic that assigns initial instruction ordinals which are representative of minimal instruction operation sizes of said instructions, without regard to the assigned instruction ordinals' compatibility with one another; b) assignment means for assigning a plurality of initial instruction ordinals to said instructions, upon generating said instruction for said source program being compiled, said assignment being made based on said set of predetermined initial instruction ordinal assignment policies; c) a set of predetermined instruction ordinal assignment adjustment policies for governing assignment adjustment of said assigned instruction ordinals, said predetermined assignment adjustment policies embodying logic that avoids unnecessary assignment adjustments to instruction ordinals representative of the larger instruction operation sizes; d) adjustment means for iteratively adjusting said instruction ordinal assignments until said instruction ordinal assignments converge into a set of assigned instruction ordinals compatible with one another, said iterative assignment adjustment being made based on said set of predetermined instruction ordinal assignment adjustment policies; e) a set of predetermined instruction ordinal mapping policies for governing mapping of assigned instruction ordinals to represented instruction operation sizes, said predetermined mapping policies embodying logic that identifies the instruction operation sizes represented by the instruction ordinals and necessary instruction insertions; and f) mapping means for mapping said compatible instruction ordinals to represented instruction operation sizes, and conditionally inserting additional instructions to the generated instructions if necessary, based on said set of predetermined mapping policies.

Claim 19

The computer system as set forth in claim 16, wherein, said adjustment means iteratively adjusts said instruction ordinal assignments by performing data flow analysis on said generated instructions to identify all data flow related instructions requiring propagation of their assigned instruction ordinals to their data flow related instructions to achieve instruction ordinal compatibility; deriving a first-in-first-out instruction ordinal propagation list based on the results of said data flow analysis, said propagation list comprising a plurality of instruction ordinal and propagation target pairs, each pair identifying an instruction ordinal to be propagated and an instruction that is the immediate target of the particular propagation; removing the frontmost instruction ordinal and propagation target instruction pair from said propagation list; conditionally adjusting the current instruction ordinal assignment of the propagation target instruction based on said predetermined assignment adjustment policies; adding one or more instruction ordinal and propagation target instruction pair to the front of said propagation list if an assignment adjustment is made, said addition being made based on said newly adjusted instruction ordinal assignment of said propagation target instruction and the immediate data flow related instruction of said propagation target instruction; and repeating said removal, said conditional assignment adjustment, and said conditional instruction insertions, until said propagation list is empty.

Claim 20

The computer system as set forth in claim 16, wherein, said assignment, adjustment and mapping means use instruction ordinals including, in ascending order, instruction ordinals BYTEsize, SIGNBsize, BYTE -- plus -- size, HWsize, SIGNHsize, ZEROSsize, HW -- plus -- size, ZEROXsize, SIGNXsize and WDsize representing an unsigned byte instruction operation size, a signed byte instruction operation size, a greater than 8-bit result from 8-bit operands instruction operation size, an unsigned short instruction operation size, a signed short instruction operation size, a signed short that can be used as unsigned short instruction operation size, a greater than 16-bit result from 16-bit operand instruction operation size, a zero extend before 32-bit operation instruction operation size, a sign extend before 32-bit operation instruction operation size, and a 32-bit instruction operation size respectively.

Claim 21

The computer system as set forth in claim 18, wherein, said assignment, adjustment and mapping means process instructions having instruction types including a Byte load sign extend instruction type; said assignment means employs initial assignment policies embodying logic that assigns said SIGNBsize instruction ordinal to an instruction of said Byte load sign extend instruction type as its initial instruction ordinal assignment; said adjustment means employs assignment adjustment policies embodying logic that adjusts the current instruction ordinal assignment (i -- size) of an instruction of said Byte load sign extend instruction type that is the immediate target of an instruction ordinal being propagated (p -- size), as follows: if (p -- size>BYTE -- plus -- size) i -- size=SIGNXsize; and said mapping means employs mapping policies embodying logic that maps the assigned instruction ordinal of an instruction of said Byte load sign extend instruction type and conditionally inserting one or more instructions as follows: ______________________________________ instruction operation size = a byte, if (i.sub.-- size) > BYTE.sub.-- plus.sub.-- size), add code to sign-extend an 8-bit register of the Byte load sign extend instruction to a 32-bit register. ______________________________________

Claim 22

The computer system as set forth in claim 18, wherein, said assignment, adjustment and mapping means process instructions having instruction types including a Byte load zero extend instruction type; said assignment means employs initial assignment policies embodying logic that assigns said BYTEsize instruction ordinal to an instruction of said Byte load zero extend instruction type as its initial instruction ordinal assignment; said adjustment means employs assignment adjustment policies embodying logic that adjusts the current instruction ordinal assignment (i -- size) of an instruction of said Byte load zero extend instruction type, that is the immediate target of an instruction ordinal being propagated (p -- size), as follows: if (p -- size=SIGNBsize) i -- size=ZEROXsize, if (p -- size>BYTE -- plus -- size) i -- size=ZEROXsize; and said mapping means employs mapping policies embodying logic that maps the assigned instruction ordinal of an instruction of said Byte load zero extend instruction type and conditionally inserting one or more instructions as follows: ______________________________________ instruction operation size = a byte, if (i.sub.-- size > BYTE.sub.-- plus.sub.-- size) add code to clear a register of the Byte load zero extend instruction. ______________________________________

Claim 23

The computer system as set forth in claim 18, wherein, said assignment, adjustment and mapping means process instructions having instruction types including a 16-bit load sign extend instruction type; said assignment means employs initial assignment policies embodying logic that assigns said SIGNHsize to an instruction of said 16-load sign extend instruction type as its initial instruction ordinal; said adjustment means employs assignment adjustment policies embodying logic that adjusts the current instruction ordinal assignment (i -- size) of an instruction of said 16-bit load sign extend instruction type, that is the immediate target of an instruction ordinal being propagated (p -- size), as follows: if (p -- size=ZEROSsize) i -- size=ZEROSsize, else if (p -- size>HW -- plus -- size) i -- size=SIGNXsize; and said mapping means employs mapping policies embodying logic that maps the assigned instruction ordinal of an instruction of said 16-bit load sign extend instruction type and conditionally inserting one or more instructions as follows: ______________________________________ if (i.sub.-- size = ZEROSsize) instruction operation size = a word, add code to clear a result register of the instruction of said 16-bit load sign extend instruction type, load 16 bits into a right half of said result register, else instruction operation size = half of a word if (i.sub.-- size > HW.sub.-- plus.sub.-- size) add code to sign extend a 16-bit register of the instruction of said 16-bit load sign extend instruction type to a 32-bit register. ______________________________________

Claim 24

The computer system as set forth in claim 18, wherein, said assignment, adjustment and mapping means process instructions having instruction types including a 16-bit load zero extend instruction type; said assignment means employs initial assignment policies embodying logic that assigns said HWsize to an instruction of said 16-bit load zero extend instruction type as its initial instruction ordinal; said adjustment means employs assignment adjustment policies embodying logic that adjusts the current instruction ordinal assignment (i -- size) of an instruction of said 16-bit load zero extend instruction type, that is the immediate target of an instruction ordinal being propagated (p -- size), as follows: if (p -- size=SIGNHsize) i -- size=ZEROXsize, if (p -- size=ZEROSsize) i -- size=ZEROXsize, if (p -- size>HW -- plus -- size) i -- size=ZEROXsize; and said mapping means employs mapping policies embodying logic that maps the assigned instruction ordinal of an instruction of said 16-bit load zero extend instruction type and conditionally inserting one or more instructions as follows: ______________________________________ if (i.sub.-- size <= HW.sub.-- plus.sub.-- size) instruction operation size = half of a word, else instruction operation size = a word, add code to clear a result register of the instruction of said 16-bit load zero extend instruction type, load 16 bits into a right half of said result register. ______________________________________

Claim 25

The computer system as set forth in claim 18, wherein, said assignment, adjustment and mapping means process instructions having instruction types including a non-Byte and non-16-bit load instruction type; said assignment means employs initial assignment policies embodying logic that assigns WDsize to an instruction of said non-Byte and non-16-bit load instruction type as its initial instruction ordinal; said adjustment means employs assignment adjustment policies embodying logic that adjusts the current instruction ordinal assignment (i -- size) of an instruction of said non-Byte and non 16-bit load instruction type, that is the immediate target of an instruction ordinal being propagated (p -- size), as follows: if (p -- size>i -- size) i -- size=p -- size; and said mapping means employs mapping policies embodying logic that maps the assigned instruction ordinal of an instruction of said non-byte and non 16-bit load zero extend instruction type and conditionally inserting one or more instructions as follows: instruction operation size=original load size.

Claim 26

The computer system as set forth in claim 18, wherein, said assignment, adjustment and mapping means process instructions having instruction types including a STORE instruction type, said STORE instruction type comprising STORE instructions for storing data, each of said data being stored having a data size of a selected one of said BYTEsize, HWsize and WDsize; said assignment means employs initial assignment policies embodying logic that assigns the size of the data being stored by an instruction of said STORE instruction type as its initial instruction ordinal; said adjustment means employs assignment adjustment policies embodying logic that does not adjust the current instruction ordinal assignment of an instruction of said STORE instruction type, that is the immediate target of an instruction ordinal being propagated; and said mapping means employs mapping policies embodying logic that maps the assigned instruction ordinal of an instruction of said STORE instruction type and conditionally inserting one or more instructions as follows: instruction operation size=original store size.

Claim 27

The computer system as set forth in claim 18, wherein, said assignment, adjustment and mapping means process instructions having instruction types including a sign extend convert instruction type, said sign extend convert instruction type comprising instructions for converting data to a selected one of said SIGNHsize and SIGNBsize; said assignment means employs initial assignment policies embodying logic that assigns the size of the data being converted by an instruction of said sign extend convert instruction type as its initial instruction ordinal; said adjustment means employs assignment adjustment policies embodying logic that adjusts the current instruction ordinal assignment (i -- size) an instruction of said sign extend convert instruction type, that is the immediate target of an instruction ordinal being propagated (p -- size), as follows: if (p -- size>i -- size) i -- size=p -- size; and said mapping means employs mapping policies embodying logic that maps the assigned instruction ordinal of an instruction of said sign extend convert instruction type and conditionally inserting one or more instructions as follows: ______________________________________ instruction operation size = one word; if (i.sub.-- size = ZEROSsize) treat said instruction of the sign extend convert instruction type as an instruction of a zero extend convert type, if (i.sub.-- size <= HW.sub.-- plus.sub.-- size and 16 bit extend and size(operand) <= HW.sub.-- plus.sub.-- size) delete the instruction of said sign extend convert instruction type, if (i.sub.-- size <= BYTE.sub.-- plus.sub.-- size and 24 bit extend and size(operand) <= BYTE.sub.-- plus.sub.-- size) delete the instruction of said sign extend convert instruction type. ______________________________________

Claim 28

The computer system as set forth in claim 18, wherein, said assignment, adjustment and mapping means process instructions having instruction types including a zero extend convert instruction type, said zero extend convert instruction type comprising instructions for converting data to a selected one of said BYTEsize and HWsize; said assignment means employs initial assignment policies embodying logic that assigns the size of the data being converted by an instruction of said zero extend convert instruction type as its initial instruction ordinal; said adjustment means employs assignment adjustment policies embodying logic that adjusts the current instruction ordinal assignment (i -- size) an instruction of said zero extend convert instruction type, that is the immediate target of an instruction ordinal being propagated (p -- size), as follows: if (p -- size>i -- size) i -- size=p -- size; and said mapping means employs mapping policies embodying logic that maps the assigned instruction ordinal of an instruction of said zero extend convert instruction type and conditionally inserting one or more instructions as follows: ______________________________________ instruction operation size = one word; if (i.sub.-- size <= HW.sub.-- plus.sub.-- size and 16 bit extend and size(operand) <= HW.sub.-- plus.sub.-- size) delete the instruction of said zero extend convert instruction type, if (i.sub.-- size <= BYTE.sub.-- plus.sub.-- size and 24 bit extend and size(operand) <= BYTE.sub.-- plus.sub.-- size) delete the instruction of said zero extend convert instruction type. ______________________________________

Claim 29

The computer system as set forth in claim 18, wherein, said assignment, adjustment and mapping means process instructions having instruction types including an enter constant instruction type, said enter constant instruction type comprising instructions for entering constants; said assignment means employs initial assignment policies embodying logic that assigns the initial instruction ordinal of an instruction of said enter constant instruction type as follows: WDsize, if (-8000≦n≦7fff) then SIGNHsize, if (0≦n≦7fff) then HWsize, if (-80≦n≦7f) the SIGNBsize, if (0≦n≦7f) then BYTEsize, where n is said constant's value; said adjustment means employs assignment adjustment policies embodying logic that adjusts the current instruction ordinal assignment (i -- size) an instruction of said enter constant instruction type, that is the immediate target of an instruction ordinal being propagated (p -- size), as follows: if (p -- size>WDsize) i -- size=p -- size, if (-8000≦n≦7fff and p -- size=ZEROSsize) i -- size=p -- size, if (-8000≦n≦7fff and p -- size>HW -- plus -- size) i -- size=p -- size, if (-80≦n≦7f and p -- size>BYTE -- plus -- size) i -- size=p -- size; and said mapping means employs mapping policies embodying logic that maps the assigned instruction ordinal of an instruction of said enter constant instruction type and conditionally inserting one or more instructions as follows: ______________________________________ instruction operation size = word, if (i.sub.-- size <= BYTE.sub.-- plus.sub.-- size) instruction operation size = a byte. else if (i.sub.-- size = ZEROSsize) constant = constant and Oxff ______________________________________

Claim 30

The computer system as set forth in claim 18, wherein, said assignment, adjustment and mapping means process instructions having instruction types including a first comparison instruction type (Compare-eq, ne); said assignment means employs initial assignment policies embodying logic that does not assign an initial instruction ordinal to an instruction of said first comparison instruction type; said adjustment means employs assignment adjustment policies embodying logic that adjusts the current instruction ordinal assignment (i -- size) an instruction of said first comparison instruction type, that is the immediate target of an instruction ordinal being propagated (p -- size), as follows: ______________________________________ if (p.sub.-- size > i.sub.-- size) { i.sub.-- size = p.sub.-- size, if (p.sub.-- size = HWsize)i.sub.-- size = ZEROXsize, if (p.sub.-- size = SIGNHsize)i.sub.-- size = ZEROSsize, if (p.sub.-- size = HW.sub.-- plus.sub.-- size or p.sub.-- size = BYTE.sub.-- plus.sub.-- size) i.sub.-- size = SIGNXsize; and ______________________________________ said mapping means employs mapping policies embodying logic that maps the assigned instruction ordinal of an instruction of said first comparison instruction type and conditionally inserting one or more instructions as follows: ______________________________________ instruction operation size = a word, if (i.sub.-- size <= BYTE.sub.-- plus.sub.-- size) instruction operation size = a byte. ______________________________________

Claim 31

The computer system as set forth in claim 18, wherein, said assignment, adjustment and mapping means process instructions having instruction types including a second comparison instruction type (Compare-gt, ge, lt, le); said assignment means employs initial assignment policies embodying logic does not assign an initial instruction ordinal to an instruction of said second comparison instruction type; said adjustment means employs assignment adjustment policies embodying logic that adjusts the current instruction ordinal assignment (i -- size) an instruction of said second comparison instruction type, that is the immediate target of an instruction ordinal being propagated (p -- size), as follows: ______________________________________ if (p.sub.-- size > i.sub.-- size and p.sub.-- size != ZEROSsize) { i.sub.-- size = p.sub.-- size, if (i.sub.-- size = HWsize)i.sub.-- size = ZEROXsize, if (p.sub.-- size = HW.sub.-- plus.sub.-- size or p.sub.-- size = BYTE.sub.-- plus.sub.-- size) i.sub.-- size = SIGNXsize; and ______________________________________ said mapping means employs mapping policies embodying logic that maps the assigned instruction ordinal of an instruction of said second comparison instruction type and conditionally inserting one or more instructions as follows: ______________________________________ instruction operation size = a word, if (i.sub.-- size = HW.sub.-- size or i.sub.-- size = SIGNHsize) add code to shift operands of the instruction of said second comparison instruction type 16 bits with zero fill, else if (i.sub.-- size < BYTE.sub.-- plus.sub.-- size) instruction operation size = a byte. ______________________________________

Claim 32

The computer system as set forth in claim 18, wherein, said assignment, adjustment and mapping means process instructions having instruction types including a move instruction type; said assignment means employs initial assignment policies embodying logic that does not assign an initial instruction ordinal to an instruction of said move instruction type; said adjustment means employs assignment adjustment policies embodying logic that adjusts the current instruction ordinal assignment (i -- size) an instruction of said move type, that is the immediate target of an instruction ordinal being propagated (p -- size), as follows: if (p -- size>i -- size) i -- size=p -- size; and said mapping means employs mapping policies embodying logic that maps the assigned instruction ordinal of an instruction of said move instruction type and conditionally inserting one or more instructions as follows: ______________________________________ instruction operation size = a word, if (i.sub.-- size = <BYTE.sub.-- plus.sub.-- size) instruction operation size = a byte. ______________________________________

Claim 33

The automated method as set forth in claim 3, wherein, said steps (a) though (c) are performed on instructions having instruction types including an arithmetic and like operation instruction type (Add, Sub, etc.); said step (a) is performed using initial assignment policies embodying logic that assigns said BYTE -- plus -- size instruction ordinal to an instruction of said Add, Sub, etc. instruction type as its initial instruction ordinal assignment; said step (b) is performed using assignment adjustment policies embodying logic that adjusts the current instruction ordinal assignment (i -- size) of an instruction of said Add, Sub, etc. instruction type that is the immediate target of an instruction ordinal being propagated (p -- size) as follows: ______________________________________ if (p.sub.-- size > i.sub.-- size) { i.sub.-- size = p.sub.-- size, if (p.sub.-- size <= HW.sub.-- plus.sub.-- size)i.sub.-- size = HW.sub.-- plus.sub.-- size, if (p.sub.-- size <= BYTE.sub.-- plus.sub.-- size)i.sub.-- size = BYTE.sub.-- plus.sub.-- size, };and ______________________________________ said step (c) is performed using mapping policies embodying logic that maps the assigned instruction ordinal of an instruction of said Add, Sub etc. instruction type and conditionally inserting one or more instructions as follows: ______________________________________ instruction operation size = a word, if (i.sub.-- size <= BYTE.sub.-- plus.sub.-- size and the instruction has a byte version), instruction operation size = byte. ______________________________________

Claim 34

The improved computer system as set forth in claim 18, wherein, said assignment, adjustment and mapping means process instructions having instruction types including an arithmetic and like operation instruction type (Add, Sub, etc.); said assignment means employs initial assignment policies embodying logic that assigns said BYTE -- plus -- size instruction ordinal to an instruction of said Add, Sub, etc. instruction type as its initial instruction ordinal assignment; said adjustment means employs assignment adjustment policies embodying logic that adjusts the current instruction ordinal assignment (i -- size) of an instruction of said Add, Sub, etc. instruction type that is the immediate target of an instruction ordinal being propagated (p -- size) as follows: ______________________________________ if (p.sub.-- size > i.sub.-- size) { i.sub.-- size = p.sub.-- size, if (p.sub.-- size <= HW.sub.-- plus.sub.-- size)i.sub.-- size = HW.sub.-- plus.sub.-- size, if (p.sub.-- size <= BYTE.sub.-- plus.sub.-- size)i.sub.-- size = BYTE.sub.-- plus.sub.-- size, };and ______________________________________ said mapping means employs mapping policies embodying logic that maps the assigned instruction ordinal of an instruction of said Add, Sub etc. instruction type and conditionally inserting one or more instructions as follows: ______________________________________ instruction operation size = a word, if (i.sub.-- size <= BYTE.sub.-- plus.sub.-- size and the instruction has a byte version), instruction operation size = a byte. ______________________________________