Variable gain amplifier for low supply voltage systems

Claim 2

A variable gain amplifier, comprising: a first voltage-to-current amplifier having a fixed gain; a second voltage-to-current amplifier having a variable gain, functioning in parallel to said first amplifier; a variable current generator, connected to provide a variable current which varies with the gain of said second amplifier; a current-to-voltage converter; current output signals produced by said first and second amplifiers and by said variable current generator being summed and the resulting current signal being converted by said converter; whereby said variable current prevents any change in offset current due to changed gain of said second amplifier.

Claim 3

A variable gain amplifier according to claim 1, further comprising a summing circuit capable of providing a low impedance node onto which said current output signals are summed.

Claim 4

A variable gain amplifier according to claim 2, wherein said summing circuit comprises a pair of cascode configured transistors, functionally connected between respective output nodes of said first and second amplifiers and of said variable current generator and respective loads, which constitute said current-to-voltage converter.

Claim 5

A variable gain amplifier as defined in claim 1, wherein said first amplifier is composed of a first differential pair of transistors, a first degeneration resistance and a pair of fixed bias current generators, and said second amplifier is composed of a second differential pair of transistors, a second degeneration resistance and a pair of variable bias current generators.

Claim 6

A variable gain amplifier as defined in claim 1, wherein said first and second amplifiers and said variable current generator include bipolar junction transistors.

Claim 7

An integrated variable gain amplifier, comprising: a first amplifier block connected to receive first and second input voltage signals, and connected to produce a first output current on first and second output current terminals, the magnitude of said first output current being controlled by a fixed DC biasing current driving said first amplifier block so as to determine a fixed gain thereof; a second amplifier block connected to receive said first and second input voltage signals, and connected to produce a second output current on said first and second output current terminals, the magnitude of said second output current being controlled by a variable DC biasing current driving said second amplifier block so as to determine a variable gain thereof, the value of said variable DC biasing current being a combination of said fixed DC biasing current and of a variable current, controlled by an external control signal, and the DC part of said second output current depending only on said fixed DC biasing current.

Claim 8

An integrated variable gain amplifier, comprising: a first amplifier block connected to receive first and second input voltage signals, and connected to produce a first output current on first and second output current terminals, the magnitude of said first output current being controlled by a fixed DC biasing current driving said first amplifier block so as to determine a fixed gain thereof; a second amplifier block connected to receive said first and second input voltage signals, and connected to produce a second output current on said first and second output current terminals, the magnitude of said second output current being controlled by a variable DC biasing current driving said second amplifier block so as to determine a variable gain thereof, the value of said variable DC biasing current being a combination of said fixed DC biasing current and of a variable current, controlled by an external control signal, and the DC part of said second output current depending only on said fixed DC biasing current.

Claim 9

An integrated variable gain amplifier according to claim 6, wherein said variable DC biasing current is the difference between said fixed DC biasing current and said variable current.

Claim 10

An integrated variable amplifier according to claim 6, wherein said fixed and variable DC biasing currents, and said variable current are provided by first, second and third pairs of current generators respectively.

Claim 11

An integrated variable gain amplifier according to claim 6, wherein said second amplifier block consists of a variable current generator, generating said variable current and being driven by the external control signal, and a variable amplifier controlled by said variable DC biasing current.

Claim 12

An integrated variable gain amplifier according to claim 9, wherein said first amplifier block comprises a first differential pair of transistors, a first degeneration resistance and a pair of fixed bias current generators, and wherein said variable amplifier comprises a second differential pair of transistors, a second degeneration resistance and a first pair of variable bias current generators.

Claim 13

An integrated variable gain amplifier according to claim 10, wherein said variable current generator comprises a third differential pair of transistors controlled by the external control signal and a second pair of variable bias current generators, generating a current which is the difference between the currents generated by said pair of fixed bias current generators and said first pair of variable bias current generators.

Claim 14

An integrated variable gain amplifier according to claim 6, further comprising a current to voltage converter, connected to said first and second output current terminals to produce an output voltage signal.

Claim 15

An integrated variable gain amplifier according to claim 12, wherein said current to voltage converter consists of first and second loads respectively connected to said first and second output current terminals.

Claim 16

An integrated variable gain amplifier according to claim 12, further comprising a summing circuit connected between said first and second output current terminals and said current to voltage converter, to produce a low impedance node at said first and second output current terminals whereat said first and second output currents are summed.

Claim 17

An integrated variable gain amplifier according to claim 14, wherein said summing circuit comprises a pair of cascode configured transistors.

Claim 18

An integrated variable gain amplifier according to claim 6, wherein said first and second amplifier blocks include bipolar junction transistors.

Claim 19

An integrated variable gain amplifier according to claim 6, wherein the supply voltage is about 3 Volt, whereby a frequency band wider than 160 MHz is provided.

Claim 20

An integrated variable gain amplifier, comprising: a first differential pair of transistors, constituting a fixed gain amplifier, connected to receive an input voltage signal, a fixed gain being determined by a fixed biasing current flowing therethrough; a second differential pair of transistors, constituting a variable gain amplifier, connected to receive said input voltage signal, a variable gain being determined by a variable biasing current flowing therethrough; said first and second differential pairs of transistors being connected to operate in parallel; a third differential pair of transistors, constituting a variable current generator, controlled by an external control signal to produce a complementary DC current, which varies in dependence on said variable biasing current; said first, second and third differential pair of transistors being connected to combine first and second output current respectively from said first and second differential pair of transistors with said complementary DC current to stabilize the DC operating point of the circuit.

Claim 21

An integrated variable gain amplifier, comprising: a first differential pair of transistors, constituting a fixed gain amplifier, connected to receive an input voltage signal, a fixed gain being determined by a fixed biasing current flowing therethrough; a second differential pair of transistors, constituting a variable gain amplifier, connected to receive said input voltage signal, a variable gain being determined by a variable biasing current flowing therethrough; said first and second differential pairs of transistors being connected to operate in parallel; a third differential pair of transistors, constituting a variable current generator, controlled by an external control signal to produce a complementary DC current, which varies in dependence on said variable biasing current; said first, second and third differential pair of transistors being connected to combine first and second output current respectively from said first and second differential pair of transistors with said complementary DC current to stabilize the DC operating point of the circuit.

Claim 22

An integrated variable amplifier according to claim 18, wherein said variable biasing current is the difference between said fixed biasing current and said complementary DC current.

Claim 23

An integrated variable amplifier according to claim 18, wherein said fixed and variable biasing currents, and said complementary DC current are provided by first, second and third pairs of current generators respectively.

Claim 24

An intergrated variable gain amplifier according to claim 18, wherein said first differential pair of transistors are emitter degenerated by a first degeneration resistance and are connected to a pair of fixed bias current generators, and wherein said second differential pair of transistors are emitter degenerated by a second degeneration resistance and are connected to a first pair of variable bias current generators.

Claim 25

An integrated variable gain amplifier according to claim 21, wherein said variable current generator further comprises a second pair of variable bias current generators, generating a current which is the difference between the currents generated by said pair of fixed bias current generators and said first pair of variable bias current generators.

Claim 26

An integrated variable gain amplifier according to claim 18, further comprising a current to voltage converter, connected to receive a combination output current, combination of said first and second output currents from said first and second differential pairs of transistors with said complementary DC current, to produce an output voltage signal.

Claim 27

An integrated variable gain amplifier according to claim 23, wherein said combination output current is provided at first and second output current nodes, and wherein said current to voltage converter consists of first and second loads respectively connected to said first and second output current nodes.

Claim 28

An integrated variable gain amplifier according to claim 23, further comprising a summing circuit connected between a node whereat said combination output current is provided and said current to voltage converter, to produce a low impedance node at said first and second output terminals whereat said first and second output currents from said first and second differential pairs of transistors and said complementary DC current are summed.

Claim 29

An integrated variable gain amplifier according to claim 25, wherein said summing circuit comprises a pair of cascode configured transistors.

Claim 30

An integrated variable gain amplifier according to claim 18, wherein said transistors are bipolar junction transistors.

Claim 31

An integrated variable gain amplifier according to claim 18, wherein the supply voltage is about 3 Volt, whereby a frequency band wider than 160 MHz is provided.

Claim 32

An integrated variable gain amplifier, comprising: a first differential pair of transistors, constituting a fixed gain amplifier, connected to receive an input voltage signal, a fixed gain being determined by a fixed biasing current flowing therethrough; a second differential pair of transistors, constituting a variable gain amplifier, connected to receive said input voltage signal, a variable gain being determined by a variable biasing current flowing therethrough; said first and second differential pair of transistors being connected to operate in parallel; a third differential pair of transistors, constituting a variable current generator, controlled by an external control signal to produce a complementary DC current, which varies together with said variable biasing current; said first, second and third differential pair of transistors being connected at first and second combination nodes to combine first and second output currents respectively from said first and second differential pair of transistors with said complementary DC current to stabilize the DC operating point of the circuit; a pair of cascode configured transistors, connected between said first and second combination nodes to produce a low impedance node; and first and second loads; whereby said first and second loads and said pair of cascode configured transistors provide a voltage output with a desirable impedance at a node therebetween.

Claim 33

An integrated variable gain amplifier, comprising: a first differential pair of transistors, constituting a fixed gain amplifier, connected to receive an input voltage signal, a fixed gain being determined by a fixed biasing current flowing therethrough; a second differential pair of transistors, constituting a variable gain amplifier, connected to receive said input voltage signal, a variable gain being determined by a variable biasing current flowing therethrough; said first and second differential pair of transistors being connected to operate in parallel; a third differential pair of transistors, constituting a variable current generator, controlled by an external control signal to produce a complementary DC current, which varies together with said variable biasing current; said first, second and third differential pair of transistors being connected at first and second combination nodes to combine first and second output currents respectively from said first and second differential pair of transistors with said complementary DC current to stabilize the DC operating point of the circuit; a pair of cascode configured transistors, connected between said first and second combination nodes to produce a low impedance node; and first and second loads; whereby said first and second loads and said pair of cascode configured transistors provide a voltage output with a desirable impedance at a node therebetween.

Claim 34

An integrated variable amplifier according to claim 29, wherein said variable biasing current is the difference between said fixed biasing current and said complementary DC current.

Claim 35

An integrated variable amplifier according to claim 29, wherein said fixed and variable biasing currents, and said complementary DC current are provided by first, second and third pairs of current generators respectively.

Claim 36

An integrated variable gain amplifier according to claim 29, wherein said first differential pair of transistors are emitter degenerated by a first degeneration resistance and are connected to a pair of fixed bias current generators, and wherein said second differential pair of transistors are emitter degenerated by a second degeneration resistance and are connected to a first pair of variable bias current generators.

Claim 37

An integrated variable gain amplifier according to claim 32, wherein said variable current generator further comprises a second pair of variable bias current generators, generating a current which is the difference between the currents generated by said pair of fixed bias current generators and said first pair of variable bias current generators.

Claim 38

An integrated variable gain amplifier according to claim 29, wherein said transistors are bipolar junction transistors.

Claim 39

An integrated variable gain amplifier according to claim 29, wherein the supply voltage is about 3 Volt, whereby a frequency band wider than 160 MHz is provided.

Claim 40

A variable gain amplifier system, comprising: a variable gain cell, including: a first amplifier block connected to receive first and second input voltage signals, and connected to produce a first output current on first and second output current terminals, the magnitude of said first output current being controlled by a fixed DC biasing current driving said first amplifier block so as to determine a fixed gain thereof; a second amplifier block connected to receive said first and second input voltage signals, and connected to produce a second output current on said first and second output current terminals, the magnitude of said second output current being controlled by a variable DC biasing current driving said second amplifier block so as to determine a variable gain thereof, the value of said variable DC biasing current being a combination of said fixed DC biasing current and of a variable current, controlled by an external control signal, and the DC part of said second output current depending only on said fixed DC biasing current; an additional amplifier; said variable gain cell and said additional amplifier operating as two amplifying stages in cascade.

Claim 41

A variable gain amplifier system, comprising: a variable gain cell, including: a first amplifier block connected to receive first and second input voltage signals, and connected to produce a first output current on first and second output current terminals, the magnitude of said first output current being controlled by a fixed DC biasing current driving said first amplifier block so as to determine a fixed gain thereof; a second amplifier block connected to receive said first and second input voltage signals, and connected to produce a second output current on said first and second output current terminals, the magnitude of said second output current being controlled by a variable DC biasing current driving said second amplifier block so as to determine a variable gain thereof, the value of said variable DC biasing current being a combination of said fixed DC biasing current and of a variable current, controlled by an external control signal, and the DC part of said second output current depending only on said fixed DC biasing current; an additional amplifier; said variable gain cell and said additional amplifier operating as two amplifying stages in cascade.

Claim 42

A variable gain amplifier system, according to claim 36, wherein said additional amplifier is a 10 volt/volt amplifier.

Claim 43

An automatic gain control system, comprising: a variable gain amplifier, including a first amplifier block connected to receive first and second input voltage signals, and connected to produce a first output current on first and second output current terminals, the magnitude of said first output current being controlled by a fixed DC biasing current driving said first amplifier block so as to determine a fixed gain thereof; a second amplifier block connected to receive said first and second input voltage signals, and connected to produce a second output current on said first and second output current terminals, the magnitude of said second output current being controlled by a variable DC biasing current driving said second amplifier block so as to determine a variable gain thereof, the value of said variable DC biasing current being a combination of said fixed DC biasing current and of a variable current, controlled by an external control signal, and the DC part of said second output current depending only on said fixed DC biasing current; a detector to detect the value of said output voltage from said variable gain amplifier and to provide an output signal accordingly; a current generator connected to be driven by said detector and to produce a control current the magnitude and the sense thereof depending on said output signal from said detector; a capacitor connected to be charged by said control current and to produce said external control signal.

Claim 44

An automatic gain control system, comprising: a variable gain amplifier, including a first amplifier block connected to receive first and second input voltage signals, and connected to produce a first output current on first and second output current terminals, the magnitude of said first output current being controlled by a fixed DC biasing current driving said first amplifier block so as to determine a fixed gain thereof; a second amplifier block connected to receive said first and second input voltage signals, and connected to produce a second output current on said first and second output current terminals, the magnitude of said second output current being controlled by a variable DC biasing current driving said second amplifier block so as to determine a variable gain thereof, the value of said variable DC biasing current being a combination of said fixed DC biasing current and of a variable current, controlled by an external control signal, and the DC part of said second output current depending only on said fixed DC biasing current; a detector to detect the value of said output voltage from said variable gain amplifier and to provide an output signal accordingly; a current generator connected to be driven by said detector and to produce a control current the magnitude and the sense thereof depending on said output signal from said detector; a capacitor connected to be charged by said control current and to produce said external control signal.

Claim 45

An automatic gain control system, comprising: a variable gain amplifier, including a first fixed gain amplifier; a second variable gain amplifier; a variable current generator, connected to vary the gain of said second variable gain amplifier; said first and second amplifiers being connected to operate in parallel to receive an input signal, and said first and second amplifier and said variable current generator being connected to produce a combination output signal, wherein the DC part of said combination output signal is constant; said variable gain amplifier being controlled by a control input to produce a variable gain signal; a level detector, connected to receive said combination output signal, and operatively connected to control said control input of said variable gain amplifier in dependence on said combination output signal.

Claim 46

An automatic gain control system, comprising: a variable gain amplifier, including a first fixed gain amplifier; a second variable gain amplifier; a variable current generator, connected to vary the gain of said second variable gain amplifier; said first and second amplifiers being connected to operate in parallel to receive an input signal, and said first and second amplifier and said variable current generator being connected to produce a combination output signal, wherein the DC part of said combination output signal is constant; said variable gain amplifier being controlled by a control input to produce a variable gain signal; a level detector, connected to receive said combination output signal, and operatively connected to control said control input of said variable gain amplifier in dependence on said combination output signal.