US5412241A
Expired / Lapsed
US
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Method for making an improved high voltage thin film transistor having a linear doping profile
Assignee: NXP BV
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Filing: 1993-08-03
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Granted: 1995-05-02
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Expires: 2013-08-03
Abstract
Abstract This application is directed to an improved thin film SOI device in which a gate region extends over a thin layer of silicon having a lateral linear doping region on a buried oxide layer. The gate region of this invention includes a gate electrode and a field plate extending laterally from the gate electrode over the lateral linear doping region.
Inventors
- 👤 Steven L. Merchant
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-06 01:48
CPC Classifications
H; H10; H10D; H10D64/00; H10D64/111; H10D12/00; H10D12/411; H10D12/421; H10D30/00; H10D30/01; H10D30/021; H10D30/031; H10D30/0321; H10D30/0323; H10D30/60; H10D30/64; H10D30/65; H10D30/657; H10D30/67; H10D30/6704; H10D30/6708; H10D30/6713; H10D30/6715; H10D30/6717; H10D30/6729; H10D30/673; H10D8/00; H10D62/00; H10D62/10; H10D62/13; H10D62/149; H10D62/151; H10D64/20; H10D64/27; H10D64/311; H10D64/411; H10D64/511; H10D64/514; H10D64/516
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
107 words
In a thin film SOI device comprising a buried oxide layer, a thin layer of silicon having a lateral linear doping region on said buried oxide layer, a top oxide layer on said thin layer of silicon, a gate region at one end of said thin layer, a drain region at an opposite end of said thin layer, a source region laterally separated from said gate region, the improvement comprising said gate region including a gate electrode and a field plate extending laterally from said gate electrode over said lateral linear doping region, wherein said buried oxide layer and said top oxide layer have the same thickness.
Claim 2
Dependent Claim
107 words
In a thin film SOI device comprising a buried oxide layer, a thin layer of silicon having a lateral linear doping region on said buried oxide layer, a top oxide layer on said thin layer of silicon, a gate region at one end of said thin layer, a drain region at an opposite end of said thin layer, a source region laterally separated from said gate region, the improvement comprising said gate region including a gate electrode and a field plate extending laterally from said gate electrode over said lateral linear doping region, wherein said buried oxide layer and said top oxide layer have the same thickness.
Claim 3
Dependent Claim
40 words
A thin layer SOI device as claimed in claim 1, wherein said linear lateral doping region depletes into both said buried oxide layer and said top oxide layer, thereby doubling the conductive charge placed on said lateral linear doping region.
Claim 4
Dependent Claim
31 words
A thin layer SOI device as claimed in claim 1, wherein said buried oxide layer and said top oxide layer each have a thickness ranging from about 1 to 1.5 microns.
Claim 5
Dependent Claim
25 words
A thin layer SOI device as claimed in claim 1, wherein said thin layer of silicon has a thickness ranging from 1000 to 2000 angstroms.
Claim 6
Dependent Claim
26 words
A thin layer SOI device as claimed in claim 1, wherein said gate electrode and said field plate each have a thickness of about 5000 angstroms.
Claim 7
Dependent Claim
24 words
A thin layer SOI device as claimed in claim 1, wherein said SOI device has a high breakdown voltage, such as approximately 710 volts.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
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| 3.5 Years (Year 4) | 1998-05-01 | 1998-10-31 | 1999-05-02 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2002-05-01 | 2002-10-31 | 2003-05-02 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2006-05-01 | 2006-10-31 | 2007-05-02 | $7700.00 | Window Closed / Lapsed |