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US5412232A Expired / Lapsed US ⏱️ 0.0 years remaining

Semiconductor device having an improved electron transport property at a high electric field

Assignee: NEC Corp
•
Filing: 1994-03-11
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Granted: 1995-05-02
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Expires: 2014-03-11
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Abstract

Abstract In a semiconductor device having quantum wire structure formed by first and second semiconductor layers, the first and the second semiconductor layers are used as quantum well and quantum barrier layers, respectively. The quantum well layer has a first conduction band having a first Γ-valley and a first L-valley. The first Γ-valley has a first Γ-valley energy level. The first L-valley has a first L-valley energy level which is not lower than the first Γ-valley energy level. The quantum barrier layer has a second conduction band having a second energy level which is higher than the first L-valley energy level. The quantum wire structure is extended towards a predetermined direction. More particularly, the predetermined direction is parallel to a crystal orientation of (100).

Inventors

  • 👤 Yuji Ando

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-31 13:10
CPC Classifications
B; B82; B82Y; B82Y10/00; H; H10; H10D; H10D62/00; H10D62/80; H10D62/81; H10D62/812; H10D62/813

Claims Analysis

Total Claims: 32
Claim 1
Independent Claim 151 words
A semiconductor device having a quantum wire structure formed by first and second semiconductor layers, said quantum wire structure being extended towards a predetermined direction, said second semiconductor layer comprising: a first electron supplying layer; and a second electron supplying layer; said first semiconductor layer being interposed between said first and said second-electron supplying layers: said first semiconductor layer having a first conduction band which has a first Γ-valley and a first L-valley, said first Γ-valley having a first Γ-valley energy level, said first L-valley having a first L-valley energy level which is not lower than said first Γ-valley energy level: said second semiconductor layer having a second conduction band which has a second energy level which is defined by an energy level of the bottom of said second conduction band and which is higher than said first L-valley energy level: said predetermined direction being parallel to a prescribed crystal orientation.
Claim 2
Dependent Claim 151 words
A semiconductor device having a quantum wire structure formed by first and second semiconductor layers, said quantum wire structure being extended towards a predetermined direction, said second semiconductor layer comprising: a first electron supplying layer; and a second electron supplying layer; said first semiconductor layer being interposed between said first and said second-electron supplying layers: said first semiconductor layer having a first conduction band which has a first Γ-valley and a first L-valley, said first Γ-valley having a first Γ-valley energy level, said first L-valley having a first L-valley energy level which is not lower than said first Γ-valley energy level: said second semiconductor layer having a second conduction band which has a second energy level which is defined by an energy level of the bottom of said second conduction band and which is higher than said first L-valley energy level: said predetermined direction being parallel to a prescribed crystal orientation.
Claim 3
Dependent Claim 32 words
A semiconductor device as claimed in claim 1, wherein: said first semiconductor layer is used as a quantum well layer; and said second semiconductor layer being used as a quantum barrier layer.
Claim 4
Dependent Claim 16 words
A semiconductor device as claimed in claim 1, wherein said prescribed crystal orientation is (100) orientation.
Claim 5
Dependent Claim 26 words
A semiconductor device as claimed in claim 1, wherein: said first semiconductor layer is composed of InGaAs; and said second semiconductor layer being composed of AlGaAs.
Claim 6
Dependent Claim 36 words
A semiconductor device as claimed in claim 4, wherein: said first semiconductor layer is an undoped layer; and said second semiconductor layer being further composed of an impurity which is doped in said second semiconductor layer.
Claim 7
Dependent Claim 33 words
A semiconductor device as claimed in claim 4, further comprising a semi-insulating substrate and a buffer layer formed on said semi-insulating substrate, wherein: said second semiconductor layer is formed on said buffer layer.
Claim 8
Dependent Claim 30 words
A semiconductor device as claimed in claim 6, wherein: said semi-insulating substrate is composed of GaAs which is undoped; and said buffer layer being composed of GaAs which is undoped.
Claim 9
Dependent Claim 15 words
A semiconductor device as claimed in claim 5, wherein said impurity is an n-type impurity.
Claim 10
Dependent Claim 68 words
A semiconductor device as claimed in claim 5, wherein: said first semiconductor layer has a first composition which is given by In x Ga 1-x As, where x is a first variable between 0.1 and 0.3 (both inclusive); and said second semiconductor layer has a second composition which is given by Al y Ga 1-y As, where y is a second variable between 0.35 and 0.55 (both inclusive).
Claim 11
Dependent Claim 26 words
A semiconductor device as claimed in claim 1, wherein: said first semiconductor layer is composed of InAs; and said second semiconductor layer being composed of AlGaSb.
Claim 12
Dependent Claim 36 words
A semiconductor device as claimed in claim 10, wherein: said first semiconductor layer is an undoped layer; and said second semiconductor layer being further composed of an impurity which is doped in said second semiconductor layer.
Claim 13
Dependent Claim 41 words
A semiconductor device as claimed in claim 10, further comprising a semi-insulating substrate, a superlattice layer formed on said semi-insulating substrate, and a buffer layer formed on said superlattice layer, wherein: said second semiconductor layer is formed on said buffer layer.
Claim 14
Dependent Claim 40 words
A semiconductor device as claimed in claim 12, wherein: said semi-insulating substrate is composed of GaAs which is undoped; said superlattice layer being composed of GaSb/AlSb which is undoped; and said buffer layer being composed of AlGaSb which is undoped.
Claim 15
Dependent Claim 15 words
A semiconductor device as claimed in claim 11, wherein said impurity is an n-type impurity.
Claim 16
Dependent Claim 36 words
A semiconductor device as claimed in claim 11, wherein said second semiconductor layer has a composition which is given by Al y Ga 1-y Sb, where y is a variable between zero and one (both inclusive).
Claim 17
Dependent Claim 16 words
A semiconductor device as claimed in claim 15, wherein said variable y is equal to one.
Claim 18
Dependent Claim 26 words
A semiconductor device as claimed in claim 1, wherein: said first semiconductor layer is composed of GaAs; and said second semiconductor layer being composed of InAlGaP.
Claim 19
Dependent Claim 36 words
A semiconductor device as claimed in claim 17, wherein: said first semiconductor layer is an undoped layer; and said second semiconductor layer being further composed of an impurity which is doped in said second semiconductor layer.
Claim 20
Dependent Claim 24 words
A semiconductor device as claimed in claim 17, further comprising a semi-insulating substrate, wherein: said second semiconductor layer is formed on said buffer layer.
Claim 21
Dependent Claim 30 words
A semiconductor device as claimed in claim 19, wherein: said semi-insulating substrate is composed of GaAs which is undoped; and said buffer layer being composed of GaAs which is undoped.
Claim 22
Dependent Claim 15 words
A semiconductor device as claimed in claim 18, wherein said impurity is an n-type impurity.
Claim 23
Dependent Claim 35 words
A semiconductor device as claimed in claim 21, wherein said second semiconductor layer comprises: a main film composed of InAlGaP; and an additional film located in said main film, said additional film including said impurity.
Claim 24
Dependent Claim 13 words
A semiconductor device as claimed in claim 22, wherein said impurity is silicon.
Claim 25
Dependent Claim 42 words
A semiconductor device as claimed in claim 18, wherein said second semiconductor layer has a composition which is given by In 0 .49 (Al z Ga 1-z ) 0 .51 P, where z is a variable between 0.4 and 1 (both inclusive).
Claim 26
Dependent Claim 26 words
A semiconductor device as claimed in claim 1, wherein: said first semiconductor layer is composed of InGaAl; and said second semiconductor layer being composed of InAlAs.
Claim 27
Dependent Claim 36 words
A semiconductor device as claimed in claim 25, wherein: said first semiconductor layer is an undoped layer; and said second semiconductor layer being further composed of an impurity which is doped in said second semiconductor layer.
Claim 28
Dependent Claim 33 words
A semiconductor device as claimed in claim 25, further comprising a semi-insulating substrate and a buffer layer formed on said semi-insulating substrate, wherein: said second semiconductor layer is formed on said buffer layer.
Claim 29
Dependent Claim 30 words
A semiconductor device as claimed in claim 27, wherein: said semi-insulating substrate is composed of InP which is undoped; and said buffer layer being composed of InAlAs which is undoped.
Claim 30
Dependent Claim 15 words
A semiconductor device as claimed in claim 26, wherein said impurity is an n-type impurity.
Claim 31
Dependent Claim 43 words
A semiconductor device as claimed in claim 26, wherein said second semiconductor layer comprises: a main film composed of InAlAs and said impurity; and a spacer film composed of InAlAs which is undoped, said first semiconductor layer being interposed by said spacer film.
Claim 32
Dependent Claim 57 words
A semiconductor device as claimed in claim 26, wherein: said first semiconductor layer has a first composition which is given by In x Ga 1-x As, where x is a variable between 0.7 and 0.8 (both inclusive); and said second semiconductor layer having a second composition which is given by In 0 .52 Al 0 .48 As.

References Cited (Backward Citations)

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US4933732A Cited
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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1998-05-01 1998-10-31 1999-05-02 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2002-05-01 2002-10-31 2003-05-02 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2006-05-01 2006-10-31 2007-05-02 $7700.00 Window Closed / Lapsed

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