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Heterojunction bipolar transistor

Assignee: Toshiba Corp
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Filing: 1988-06-30
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Granted: 1990-06-12
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Expires: 2008-06-30
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Abstract

Abstract A heterojunction bipolar transistor comprises a first semiconductor layer of a first conductivity type, a second semiconductor layer of the first conductivity type formed on the first semiconductor layer, a third semiconductor layer of a second conductivity type formed on the second semiconductor layer, the first, second and third semiconductor layers serving as a collector, a fourth semiconductor layer of the second conductivity type formed on the third semiconductor layer, the fourth semiconductor layer serving as a base, and a fifth semiconductor layer of the first conductivity type formed on the fourth semiconductor layer, the fifth semiconductor layer serving as an emitter, the fourth and fifth semiconductor layers together forming a heterojunction, and the fifth semiconductor layer having a larger band gap than the fourth semiconductor layer, wherein the first, second, third and fourth semiconductor layers are related as follows: ##EQU1## where N 1 , N 2 , N 3 , and N 4 are impurity concentrations of the first, second, third, and fourth semiconductor layers, respectively, e is the unit charge, ε is the dielectric constant of the collector, V bi is the built-in potential between the second and third semiconductor layers, and W 3 is the thickness of the third semiconductor layer.

Inventors

  • 👤 Riichi Katoh
  • 👤 Mamoru Kurata
  • 👤 Kouhei Morizuka

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-29 14:11
CPC Classifications
H; H10; H10D; H10D10/00; H10D10/80; H10D10/821

Claims Analysis

Total Claims: 9
Claim 1
Independent Claim 204 words
A heterojunction bipolar transistor comprising: a first semiconductor layer of a first conductivity type; a second semiconductor layer of the first conductivity type formed on said first semiconductor layer; a third semiconductor layer of a second conductivity type formed on said second semiconductor layer, said first, second and third semiconductor layers serving as a collector; a fourth semiconductor layer of said second conductivity type formed on said third semiconductor layer, said fourth semiconductor layer serving as a base; and a fifth semiconductor layer of the first conductivity type formed on said fourth semiconductor layer, said fifth semiconductor layer serving as an emitter, said fourth and fifth semiconductor layers together forming a heterojunction, and said fifth semiconductor layer having a larger band gap than said fourth semiconductor layer; wherein said first, second, third and fourth semiconductor layers are related as follows: ##EQU5## where N 1 , N 2 , N 3 , and N 4 are impurity concentrations of said first, second, third, and fourth semiconductor layers, respectively, e is the unit charge, ε is the dielectric constant of said collector, V bi is the built-in potential between said second and third semiconductor layers, and W 3 is the thickness of said third semiconductor layer.
Claim 2
Dependent Claim 204 words
A heterojunction bipolar transistor comprising: a first semiconductor layer of a first conductivity type; a second semiconductor layer of the first conductivity type formed on said first semiconductor layer; a third semiconductor layer of a second conductivity type formed on said second semiconductor layer, said first, second and third semiconductor layers serving as a collector; a fourth semiconductor layer of said second conductivity type formed on said third semiconductor layer, said fourth semiconductor layer serving as a base; and a fifth semiconductor layer of the first conductivity type formed on said fourth semiconductor layer, said fifth semiconductor layer serving as an emitter, said fourth and fifth semiconductor layers together forming a heterojunction, and said fifth semiconductor layer having a larger band gap than said fourth semiconductor layer; wherein said first, second, third and fourth semiconductor layers are related as follows: ##EQU5## where N 1 , N 2 , N 3 , and N 4 are impurity concentrations of said first, second, third, and fourth semiconductor layers, respectively, e is the unit charge, ε is the dielectric constant of said collector, V bi is the built-in potential between said second and third semiconductor layers, and W 3 is the thickness of said third semiconductor layer.
Claim 3
Dependent Claim 34 words
A transistor according to claim 1, wherein the impurity concentration N 3 of said third semiconductor layer decreases from the side of said fourth semiconductor layer toward the side of said second semiconductor layer.
Claim 4
Dependent Claim 255 words
A heterojunction bipolar transistor comprising: a first semiconductor layer of a first conductivity type; a second semiconductor layer of the first conductivity type formed on said first semiconductor layer; a third semiconductor layer of a second conductivity type formed on said second semiconductor layer, said first, second and third semiconductor layers serving as a collector; a fourth semiconductor layer of the second conductivity type formed on said third semiconductor layer, said fourth semiconductor layer having an intrinsic base region serving as a base, and an external base region formed to surround said intrinsic base region; and a fifth semiconductor layer of the first conductivity type formed on said fourth semiconductor layer, said fifth semiconductor layer serving as an emitter, said fourth and fifth semiconductor layers together forming a heterojunction, and said fifth semiconductor layer having a larger band gap than said fourth semiconductor layer; wherein said second and third semiconductor layers formed below the external base region are formed to have high resistivity; and wherein said first, second, third and fourth semiconductor layers are related as follows: ##EQU6## W 2 >W 3 where N 1 , N 2 , N 3 , and N 4 are impurity concentrations of said first, second, third, and fourth semiconductor layers, respectively, e is the unit charge, ε is the dielectric constant of said collector, V bi is the built-in potential between said second and third semiconductor layers, W 2 is the thickness of said second semiconductor layer, and W 3 is the thickness of said third semiconductor layer.
Claim 5
Dependent Claim 255 words
A heterojunction bipolar transistor comprising: a first semiconductor layer of a first conductivity type; a second semiconductor layer of the first conductivity type formed on said first semiconductor layer; a third semiconductor layer of a second conductivity type formed on said second semiconductor layer, said first, second and third semiconductor layers serving as a collector; a fourth semiconductor layer of the second conductivity type formed on said third semiconductor layer, said fourth semiconductor layer having an intrinsic base region serving as a base, and an external base region formed to surround said intrinsic base region; and a fifth semiconductor layer of the first conductivity type formed on said fourth semiconductor layer, said fifth semiconductor layer serving as an emitter, said fourth and fifth semiconductor layers together forming a heterojunction, and said fifth semiconductor layer having a larger band gap than said fourth semiconductor layer; wherein said second and third semiconductor layers formed below the external base region are formed to have high resistivity; and wherein said first, second, third and fourth semiconductor layers are related as follows: ##EQU6## W 2 >W 3 where N 1 , N 2 , N 3 , and N 4 are impurity concentrations of said first, second, third, and fourth semiconductor layers, respectively, e is the unit charge, ε is the dielectric constant of said collector, V bi is the built-in potential between said second and third semiconductor layers, W 2 is the thickness of said second semiconductor layer, and W 3 is the thickness of said third semiconductor layer.
Claim 6
Dependent Claim 34 words
A transistor according to claim 3, wherein the impurity concentration N 3 of said third semiconductor layer decreases from the side of said fourth semiconductor layer toward the side of said second semiconductor layer.
Claim 7
Dependent Claim 178 words
A heterojunction bipolar transistor comprising: a first semiconductor layer of a first conductivity type; a second semiconductor layer of the first conductivity type formed on said first semiconductor layer; a third undoped semiconductor layer formed on said second semiconductor layer; a fourth semiconductor layer of a second conductivity type formed on said third semiconductor layer, said first, second, third and fourth semiconductor layers serving as a collector; a fifth semiconductor layer of the second conductivity type formed on said fourth semiconductor layer, said fifth semiconductor layer serving as a base; and a sixth semiconductor layer of the first conductivity type formed on said fifth semiconductor layer, said fifth and sixth semiconductor layers together forming a heterojunction, and said sixth semiconductor layer having a larger band ga than said fifth semiconductor layer; wherein said first, second, fourth and fifth semiconductor layers are related as follows: N 1 >N 2 N 4 <N 5 where N 1 , N 2 , N 4 , and N 5 are impurity concentrations of said first, second, fourth, and fifth semiconductor layers, respectively.
Claim 8
Dependent Claim 178 words
A heterojunction bipolar transistor comprising: a first semiconductor layer of a first conductivity type; a second semiconductor layer of the first conductivity type formed on said first semiconductor layer; a third undoped semiconductor layer formed on said second semiconductor layer; a fourth semiconductor layer of a second conductivity type formed on said third semiconductor layer, said first, second, third and fourth semiconductor layers serving as a collector; a fifth semiconductor layer of the second conductivity type formed on said fourth semiconductor layer, said fifth semiconductor layer serving as a base; and a sixth semiconductor layer of the first conductivity type formed on said fifth semiconductor layer, said fifth and sixth semiconductor layers together forming a heterojunction, and said sixth semiconductor layer having a larger band ga than said fifth semiconductor layer; wherein said first, second, fourth and fifth semiconductor layers are related as follows: N 1 >N 2 N 4 <N 5 where N 1 , N 2 , N 4 , and N 5 are impurity concentrations of said first, second, fourth, and fifth semiconductor layers, respectively.
Claim 9
Dependent Claim 34 words
A transistor according to claim 5, wherein the impurity concentration N 4 of said fourth semiconductor layer decreases from the side of said fifth semiconductor layer toward the side of said third semiconductor layer.

References Cited (Backward Citations)

US4750025A Cited
US4593305A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1993-06-11 1993-12-11 1994-06-12 $2000.00 Window Closed / Lapsed
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