Memory based on arrays of capacitors

Abstract

Abstract A memory constructed from a plurality of capacitor elements organized into a two-dimensional array having a plurality of rows and columns. Each capacitor element includes a bottom electrode, a top electrode, and a dielectric layer disposed between the top and bottom electrodes, all of the bottom electrodes in each column being connected together to form a column electrode and all of the top electrodes in each row being connected together to form a row electrode. The memory is read by generating an electrical signal on one of the row electrodes while connecting the remaining row electrodes to a reference potential and sensing the current generated in one of the column electrodes. The capacitance of the capacitor elements corresponds to data values stored in the memory. Different capacitor values may be constructed by altering the area of the top electrodes or altering the dielectric constant of the dielectric layer between the corresponding top and bottom electrodes. The area of the top electrodes may be set to a first value during fabrication and then altered after fabrication of the basic structure. In this manner, a write-once-read-many (WORM) memory may be implemented.

Inventors

• 👤 Calvin B. Ward

Bibliographic Details