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US5408639A Expired / Lapsed US ⏱️ 0.0 years remaining

External memory access control for a processing system

Assignee: RPX Corp
•
Filing: 1992-07-21
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Granted: 1995-04-18
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Expires: 2012-07-21
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Abstract

Abstract A processing system of the type having a processor which accesses external memory for data and/or instructions which includes an improved external memory access control system for rendering the external memory enable time durations independent from the number of external memory accesses per unit of time for reducing power consumption of the processing system. The control system includes a selectably programmable clock for providing a clock signal of one of at least two speeds for determining the external memory access rate. The control system also includes enable duration control structure coupled to the selectably programmable clock. The enable duration control structure is arranged to enable the external memory for time durations during each memory access which are independent from the external memory access rate. Further, the enable duration control structure includes substructure for changing the duty cycle of external memory enable time duration control signals based upon the selected clock speed.

Inventors

  • 👤 Dale E. Gulick
  • 👤 James E. Bowles

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-27 20:44
CPC Classifications
G; G06; G06F; G06F13/00; G06F13/14; G06F13/20; G06F13/24; G06F1/00; G06F1/26; G06F1/32; G06F1/3203; G06F1/3206; G06F1/3215; G11; G11C; G11C8/00; G11C8/18

Claims Analysis

Total Claims: 10
Claim 1
Independent Claim 157 words
In a processing system of the type having a processor which accesses external memory for data and/or instructions, an improved external memory access control system for rendering the external memory enable time durations independent from the number of external memory accesses per unit of time for reducing power consumption of said processor, said control system comprising: selectably programmable clock means for providing a clock signal of one of at least two speeds for determining said number of external memory accesses per unit of time; and enable duration control means coupled to said clock means and being arranged to provide said external memory with external memory enable time duration control signals for establishing external memory enable time durations which are independent from said number of external memory accesses per unit of time, said enable duration control means comprising means for changing the duty cycle of external memory enable time duration control signals based upon the selected clock speed.
Claim 2
Dependent Claim 157 words
In a processing system of the type having a processor which accesses external memory for data and/or instructions, an improved external memory access control system for rendering the external memory enable time durations independent from the number of external memory accesses per unit of time for reducing power consumption of said processor, said control system comprising: selectably programmable clock means for providing a clock signal of one of at least two speeds for determining said number of external memory accesses per unit of time; and enable duration control means coupled to said clock means and being arranged to provide said external memory with external memory enable time duration control signals for establishing external memory enable time durations which are independent from said number of external memory accesses per unit of time, said enable duration control means comprising means for changing the duty cycle of external memory enable time duration control signals based upon the selected clock speed.
Claim 3
Dependent Claim 40 words
A control system as recited in claim 1, wherein said selectably programmable clock means comprises a clock which generates timing signals at a clock speed, and wherein said selectably programmable clock means further comprises means for changing said clock speed.
Claim 4
Dependent Claim 60 words
A control system as recited in claim 2, wherein said enable duration control means comprises means for monitoring said clock speed, which means for monitoring produces an output, and wherein said enable duration control means further comprises means for providing said external memory with external memory enable time duration control signals based upon said output of said means for monitoring.
Claim 5
Dependent Claim 35 words
A control system as recited in claim 1, wherein said processing system comprises a microcontroller, and wherein said external memory enable time duration control signals comprise program store enable signals having possibly varying duty cycles.
Claim 6
Dependent Claim 137 words
In a processing system of the type having a processor which accesses external memory for data and/or instructions, an improved external memory access control method for rendering the external memory enable time durations independent from the number of external memory accesses per unit of time for reducing power consumption of said processor, said method comprising the steps of: providing a clock signal of one of at least two speeds for determining said number of external memory accesses per unit of time; and providing said external memory with external memory enable time duration control signals for establishing external memory enable time durations which are independent from said number of external memory accesses per unit of time, such provision effected by changing the duty cycle of external memory enable time duration control signals based upon the selected clock speed.
Claim 7
Dependent Claim 137 words
In a processing system of the type having a processor which accesses external memory for data and/or instructions, an improved external memory access control method for rendering the external memory enable time durations independent from the number of external memory accesses per unit of time for reducing power consumption of said processor, said method comprising the steps of: providing a clock signal of one of at least two speeds for determining said number of external memory accesses per unit of time; and providing said external memory with external memory enable time duration control signals for establishing external memory enable time durations which are independent from said number of external memory accesses per unit of time, such provision effected by changing the duty cycle of external memory enable time duration control signals based upon the selected clock speed.
Claim 8
Dependent Claim 38 words
A method as recited in claim 5, wherein said step of providing a clock signal of one of at least two speeds comprises the steps of generating timing signals at a clock speed and changing said clock speed.
Claim 9
Dependent Claim 79 words
A method as recited in claim 6, wherein said step of providing said external memory with external memory enable time duration control signals comprises the step of monitoring said clock speed, which step produces an output, and wherein said step of providing said external memory with external memory enable time duration control signals further comprises the step of providing said external memory with external memory enable time duration control signals based upon said output of said means for monitoring.
Claim 10
Dependent Claim 34 words
A method as recited in claim 5, wherein said processing system comprises a microcontroller, and wherein said external memory enable time duration control signals comprise program store enable signals having possibly varying duty cycles.

References Cited (Backward Citations)

US4893271A Cited
EP0230960A2 Cited
JPS63131616A Cited
EP0472285A2 Cited
US5155480A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1998-04-17 1998-10-17 1999-04-18 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2002-04-17 2002-10-17 2003-04-18 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2006-04-17 2006-10-17 2007-04-18 $7700.00 Window Closed / Lapsed

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