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US5408404A
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US
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High frequency interleaved DC-to-AC power converter apparatus
Assignee: Boeing North American Inc
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Filing: 1993-03-25
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Granted: 1995-04-18
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Expires: 2013-03-25
Abstract
Abstract An apparatus and method for accomplishing DC-to-AC power conversion that combine the AC outputs of n interleaved, time division multiplexed inverters and steer the secondary pulses positively or negatively, as commanded by the time varying reference signal, such that the effective switching, or sampled-data, frequency of any of the inverter or pulse-steering transistors. The n interleaved inverter system can, in turn, be paralleled such that, relative to a single inverter supplying all the power, the losses for any inverter transistor are 1/np, n due to time multiplexing and p due to paralleling.
Inventors
- 👤 Daniel M. Mitchell
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-01 16:41
CPC Classifications
H; H02; H02M; H02M7/00; H02M7/42; H02M7/44; H02M7/48; H02M7/483; H02M7/49; H02M1/00; H02M1/0043; H02M7/4807; H02M7/493
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
148 words
An interleaved direct current to alternating current power converter apparatus comprising: power modulation means having a plurality of inverters and a bipolar output signal; power amplifier means for receiving the bipolar output signal of the power modulation means and for providing an output signal; and first error detection means coupled between the output signal of the power amplifier means and the power modulation means for controlling modulation; wherein the power modulation means includes control stage means coupled to zero crossing detector means and second error detection means, switching stage means for receiving a plurality of signals from the control stage means; high frequency filter stage means coupled to the switching stage means; and, third error detection means coupled to the high frequency filter means and to the control stage means, thereby allowing switching losses and conduction to be evenly distributed among all inverters of the power modulation means.
Claim 2
Dependent Claim
148 words
An interleaved direct current to alternating current power converter apparatus comprising: power modulation means having a plurality of inverters and a bipolar output signal; power amplifier means for receiving the bipolar output signal of the power modulation means and for providing an output signal; and first error detection means coupled between the output signal of the power amplifier means and the power modulation means for controlling modulation; wherein the power modulation means includes control stage means coupled to zero crossing detector means and second error detection means, switching stage means for receiving a plurality of signals from the control stage means; high frequency filter stage means coupled to the switching stage means; and, third error detection means coupled to the high frequency filter means and to the control stage means, thereby allowing switching losses and conduction to be evenly distributed among all inverters of the power modulation means.
Claim 3
Dependent Claim
40 words
The apparatus of claim 1 wherein the switching stage means comprises: a plurality of inverter means coupled in parallel to a voltage source and a equivalent number of transformers; and bi-directional switching means coupled to the output of transformer means.
Claim 4
Dependent Claim
40 words
The apparatus of claim 2 wherein the bi-directional switching means comprises: an even number of transistor devices coupled in conjunction with a complementary number of diode devices such that electrical conduction is always through the transistors regardless of current polarity.
Claim 5
Dependent Claim
38 words
The apparatus of claim 2 wherein the bi-directional switching means comprises a pair of field effect transistors coupled source terminal to source terminal and each transistor having an intrinsic diode coupled across its source terminal and drain terminal.
Claim 6
Dependent Claim
17 words
The apparatus of claim 1 wherein each inverter means is comprised of two pairs of switching means.
Claim 7
Dependent Claim
31 words
The apparatus of claim 1 wherein the first full wave rectifier means is comprised of a pair of error amplifier means serially coupled to each other via a pair of diodes.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1998-04-17 | 1998-10-17 | 1999-04-18 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2002-04-17 | 2002-10-17 | 2003-04-18 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2006-04-17 | 2006-10-17 | 2007-04-18 | $7700.00 | Window Closed / Lapsed |