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US5402077A Expired / Lapsed US ⏱️ 0.0 years remaining

Bare die carrier

Assignee: Nidec SV Probe Pte Ltd
•
Filing: 1992-11-20
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Granted: 1995-03-28
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Expires: 2012-11-20
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Abstract

Abstract An integrated circuit carrier comprising: a substrate defining an opening and an outer perimeter; a multiplicity of I/O pads disposed about the perimeter; an interconnect circuit which includes a composite of a multiplicity of individual electrical conductors which are formed in a polymer dielectric; wherein the interconnect circuit overlays a top surface of the substrate and extends across the opening so as to span the opening; a multiplicity of die contact pads connected to the conductors are disposed about the flexible polymer dielectric with particles deposited on the die contact pads; a polymer dielectric fence upstanding from the membrane and sized to receive an integrated circuit; a top cap that rests upon the integrated circuit when the integrated circuit is received within the fence; a bottom cap that rests against a bottom surface of the substrate; and a fastener for securing the top cap to the bottom cap with the integrated circuit disposed therebetween.

Inventors

  • 👤 Fariborz Agahdel
  • 👤 Brad Griswold
  • 👤 Syed Husain
  • 👤 Robert Moti
  • 👤 William C. Robinette, Jr.
  • 👤 Chung W. Ho

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-04 05:59
CPC Classifications
G; G01; G01R; G01R31/00; G01R31/28; G01R31/2851; G01R31/2884; G01R1/00; G01R1/02; G01R1/04; G01R1/0408; G01R1/0433; G01R1/0483; H; H10; H10W; H10W72/00; H10W72/50; H10W72/541; H10W72/5449

Claims Analysis

Total Claims: 31
Claim 1
Independent Claim 203 words
A bare semiconductor integrated circuit die carrier for use in testing semiconductor integrated circuits, comprising: a substrate which includes an outer perimeter region and an interior region; a multiplicity of I/O pads disposed in the outer perimeter region of said substrate; an interconnect circuit which includes a composite of a multiplicity of individual electrical conductors which are formed on a compliant polymer dielectric deposited on a top surface of said substrate; a fence that is formed integrally with the polymer dielectric and that is sized to receive the die and that upstands from a portion of the polymer dielectric that overlays the interior region; a multiplicity of die contact pads disposed on a portion of the interconnect circuit within said fence; wherein said multiplicity of electrical conductors form a multiplicity of electrical paths between said I/O pads and said die contact pads; a top cap; a bottom cap; and means for securing said substrate and the die between said top cap and said bottom cap and for providing a force normal to the substrate; whereby the normal force compresses the compliant polymer dielectric so as to planarize said die contact pads with respect to each other to improve their contact with the die.
Claim 2
Dependent Claim 203 words
A bare semiconductor integrated circuit die carrier for use in testing semiconductor integrated circuits, comprising: a substrate which includes an outer perimeter region and an interior region; a multiplicity of I/O pads disposed in the outer perimeter region of said substrate; an interconnect circuit which includes a composite of a multiplicity of individual electrical conductors which are formed on a compliant polymer dielectric deposited on a top surface of said substrate; a fence that is formed integrally with the polymer dielectric and that is sized to receive the die and that upstands from a portion of the polymer dielectric that overlays the interior region; a multiplicity of die contact pads disposed on a portion of the interconnect circuit within said fence; wherein said multiplicity of electrical conductors form a multiplicity of electrical paths between said I/O pads and said die contact pads; a top cap; a bottom cap; and means for securing said substrate and the die between said top cap and said bottom cap and for providing a force normal to the substrate; whereby the normal force compresses the compliant polymer dielectric so as to planarize said die contact pads with respect to each other to improve their contact with the die.
Claim 3
Dependent Claim 192 words
A bare semiconductor integrated circuit die carrier for use in testing semiconductor integrated circuits, comprising: a substrate which includes an inner perimeter which defines an opening and which includes an outer perimeter region; a multiplicity of I/O pads disposed in the outer perimeter region of said substrate; an interconnect circuit which includes a composite of a multiplicity of individual electrical conductors which are formed on a polymer dielectric deposited on a top surface of the substrate and extending across the opening; a fence that is formed integrally with the polymer dielectric and that is sized to receive the die and that upstands from a portion of the polymer dielectric that spans the opening; a multiplicity of die contact pads disposed on the interconnect circuit within said fence; wherein said multiplicity of electrical conductors form a multiplicity of electrical paths between said I/O pads and said die contact pads; a support member which abuts against a bottom surface of said interconnect circuit; a top cap; a bottom cap; and means for securing said substrate and the die between said top cap and said bottom cap with said substrate and the die disposed therebetween.
Claim 4
Dependent Claim 192 words
A bare semiconductor integrated circuit die carrier for use in testing semiconductor integrated circuits, comprising: a substrate which includes an inner perimeter which defines an opening and which includes an outer perimeter region; a multiplicity of I/O pads disposed in the outer perimeter region of said substrate; an interconnect circuit which includes a composite of a multiplicity of individual electrical conductors which are formed on a polymer dielectric deposited on a top surface of the substrate and extending across the opening; a fence that is formed integrally with the polymer dielectric and that is sized to receive the die and that upstands from a portion of the polymer dielectric that spans the opening; a multiplicity of die contact pads disposed on the interconnect circuit within said fence; wherein said multiplicity of electrical conductors form a multiplicity of electrical paths between said I/O pads and said die contact pads; a support member which abuts against a bottom surface of said interconnect circuit; a top cap; a bottom cap; and means for securing said substrate and the die between said top cap and said bottom cap with said substrate and the die disposed therebetween.
Claim 5
Dependent Claim 32 words
The carrier of claim 2 wherein: the defined opening is a center opening; and said interconnect circuit extends across the opening so as to form a flexible membrane that spans the opening.
Claim 6
Dependent Claim 51 words
The carrier of claim 2 further including: a resilient layer; wherein a bottom surface of said substrate and a bottom surface of said support member rest upon said resilient layer; wherein the defined opening is a rectangular gap that circumscribes said support member; and wherein said interconnect circuit spans the gap.
Claim 7
Dependent Claim 25 words
The carrier of claim 2 further including: a multiplicity of hard particles that protrude from the die contact pads in electrical contact with individual conductors.
Claim 8
Dependent Claim 26 words
The carrier of claim 2 further including: force means for applying a prescribed amount of force to an interface of the die and the interconnect circuit.
Claim 9
Dependent Claim 60 words
The carrier of claim 2 further including: a multiplicity of hard particles that protrude from the die contact pads in electrical contact with individual conductors; and force means for applying a sufficient amount of force to an interface of the die and said interconnect circuit such that individual particles penetrate any nonconductive material formed on the pads of the die.
Claim 10
Dependent Claim 15 words
The carrier of claim 2 wherein said support member is formed from a semiconductor material.
Claim 11
Dependent Claim 212 words
A bare semiconductor integrated circuit die carrier for use in testing semiconductor integrated circuits, comprising: a substrate defining an opening and an outer perimeter; a multiplicity of I/O pads disposed about the outer perimeter of said substrate; an interconnect circuit which includes a composite of a multiplicity of individual electrical conductors which are formed on a polymer dielectric which overlays a top surface of the substrate and which extends across the opening so as to form a flexible membrane that spans the opening; a multiplicity of die contact pads disposed on the interconnect circuit; wherein said multiplicity of electrical conductors form a multiplicity of electrical paths between said I/O pads and the die contact pads; a fence that is formed integrally with the polymer dielectric and that upstands from the polymer dielectric and that is sized to receive the die; a support member which abuts against a bottom surface of said interconnect circuit; a top cap; a bottom cap; means for securing said substrate and the die and said support member between said top cap and said bottom cap; and force means for applying a force normal to said support member; whereby the normal force planarizes said die contact pads with respect to each other to improve their contact with the die.
Claim 12
Dependent Claim 212 words
A bare semiconductor integrated circuit die carrier for use in testing semiconductor integrated circuits, comprising: a substrate defining an opening and an outer perimeter; a multiplicity of I/O pads disposed about the outer perimeter of said substrate; an interconnect circuit which includes a composite of a multiplicity of individual electrical conductors which are formed on a polymer dielectric which overlays a top surface of the substrate and which extends across the opening so as to form a flexible membrane that spans the opening; a multiplicity of die contact pads disposed on the interconnect circuit; wherein said multiplicity of electrical conductors form a multiplicity of electrical paths between said I/O pads and the die contact pads; a fence that is formed integrally with the polymer dielectric and that upstands from the polymer dielectric and that is sized to receive the die; a support member which abuts against a bottom surface of said interconnect circuit; a top cap; a bottom cap; means for securing said substrate and the die and said support member between said top cap and said bottom cap; and force means for applying a force normal to said support member; whereby the normal force planarizes said die contact pads with respect to each other to improve their contact with the die.
Claim 13
Dependent Claim 19 words
The carrier of claim 9 wherein said support member includes a semiconductor support that abuts against the interconnect circuit.
Claim 14
Dependent Claim 26 words
The carrier of claim 9 wherein: said support member includes a semiconductor support that abuts against the interconnect circuit; and said force means includes a spring.
Claim 15
Dependent Claim 20 words
The carrier of claim 9 wherein the interconnect circuit includes a composite of electrical conductors formed on a polymer dielectric.
Claim 16
Dependent Claim 39 words
The carrier of claim 9 wherein said electrically conductive particles are positioned on said die contact pads within said fence so as to make electrical contact with pads of the die when the die is received within said fence.
Claim 17
Dependent Claim 37 words
The carrier of claim 9 and further including a spacer that abuts said interconnect circuit and said top cap when the top cap is secured to the bottom with said substrate and with the die secured therebetween.
Claim 18
Dependent Claim 13 words
The carrier of claim 9 wherein said top cap is formed from metal.
Claim 19
Dependent Claim 17 words
The carrier of claim 9 wherein said top cap and said bottom cap are formed from metal.
Claim 20
Dependent Claim 76 words
The carrier of claim 9 further including: a multiplicity of hard particles that protrude from said die contact pads in electrical contact with individual conductors; wherein said fence is contoured so as to align the die received within said fence such that respective pads of the die directly overlay respective die contact pads; and wherein said force means applies sufficient force such that individual particles penetrate any nonconductive material formed on the pads of the die.
Claim 21
Dependent Claim 13 words
The carrier of claim 17 wherein the multiplicity of particles are electrically conductive.
Claim 22
Dependent Claim 21 words
The carrier of claim 9 wherein a layer of polymer dielectric is formed on a top surface of the semiconductor support.
Claim 23
Dependent Claim 21 words
The carrier of claim 6 wherein: said force means includes a spring disposed between said support member and said bottom cap.
Claim 24
Dependent Claim 226 words
A bare semiconductor integrated circuit die carrier for use in testing semiconductor integrated circuits, comprising: a substrate defining an opening and an outer perimeter; a multiplicity of I/O pads disposed about the outer perimeter of said substrate; an interconnect circuit which includes a composite of a multiplicity of individual electrical conductors which are formed on a polymer dielectric; wherein said interconnect circuit overlays a top surface of the substrate and extends across the opening; a multiplicity of die contact pads disposed on the interconnect circuit which form a multiplicity of electrical paths between said I/O pads and the die contact pads in the flexible membrane; a multiplicity of electrically conductive particles embedded on the die contact pads in contact with individual conductors; a polymer dielectric fence upstanding from the polymer dielectric and contoured so as to align the die such that respective pads of the die directly overlay respective electrically conductive particles that contact the individual conductors; a top cap; a bottom cap; a support member that abuts against a bottom surface of said interconnect circuit; force means for applying a sufficient amount of force to an interface of the die and said interconnect circuit such that individual particles penetrate any nonconductive material formed on the pads of the die; means for securing said substrate and the die between said top cap and said bottom cap.
Claim 25
Dependent Claim 226 words
A bare semiconductor integrated circuit die carrier for use in testing semiconductor integrated circuits, comprising: a substrate defining an opening and an outer perimeter; a multiplicity of I/O pads disposed about the outer perimeter of said substrate; an interconnect circuit which includes a composite of a multiplicity of individual electrical conductors which are formed on a polymer dielectric; wherein said interconnect circuit overlays a top surface of the substrate and extends across the opening; a multiplicity of die contact pads disposed on the interconnect circuit which form a multiplicity of electrical paths between said I/O pads and the die contact pads in the flexible membrane; a multiplicity of electrically conductive particles embedded on the die contact pads in contact with individual conductors; a polymer dielectric fence upstanding from the polymer dielectric and contoured so as to align the die such that respective pads of the die directly overlay respective electrically conductive particles that contact the individual conductors; a top cap; a bottom cap; a support member that abuts against a bottom surface of said interconnect circuit; force means for applying a sufficient amount of force to an interface of the die and said interconnect circuit such that individual particles penetrate any nonconductive material formed on the pads of the die; means for securing said substrate and the die between said top cap and said bottom cap.
Claim 26
Dependent Claim 32 words
The carrier of claim 21 wherein: the defined opening is a center opening; and said interconnect circuit extends across the opening so as to form a flexible membrane that spans the opening.
Claim 27
Dependent Claim 50 words
The carrier of claim 21 further including: a resilient layer; wherein a bottom surface of said substrate and a bottom surface of said support member rest upon said resilient layer; wherein the defined opening is a gap that circumscribes said support member; and wherein said interconnect circuit spans the gap.
Claim 28
Dependent Claim 206 words
A bare semiconductor integrated circuit die carrier for use in testing semiconductor integrated circuit, comprising: a substrate which includes an outer perimeter region and a compliant interior region which is thinner than the outer perimeter region; a multiplicity of I/O pads disposed in the outer perimeter region of said substrate; an interconnect circuit which includes a composite of a multiplicity of individual electrical conductors which are formed on a polymer dielectric deposited on a top surface of said substrate; a fence that is sized to receive the die and that upstands from a portion of the polymer dielectric that overlays the interior region; a multiplicity of die contact pads disposed on a portion of the interconnect circuit within said fence; wherein said multiplicity of electrical conductors form a multiplicity of electrical paths between said I/O pads and said die contact pads; a top cap; a bottom cap; means for securing said substrate and the die between said top cap and said bottom cap; and means for applying a force normal to said substrate; whereby the normal force pushes said substrate interior toward said semiconductor circuit so as to planarize said die contact pads with respect to each other to improve their connection with the semiconductor circuit.
Claim 29
Dependent Claim 206 words
A bare semiconductor integrated circuit die carrier for use in testing semiconductor integrated circuit, comprising: a substrate which includes an outer perimeter region and a compliant interior region which is thinner than the outer perimeter region; a multiplicity of I/O pads disposed in the outer perimeter region of said substrate; an interconnect circuit which includes a composite of a multiplicity of individual electrical conductors which are formed on a polymer dielectric deposited on a top surface of said substrate; a fence that is sized to receive the die and that upstands from a portion of the polymer dielectric that overlays the interior region; a multiplicity of die contact pads disposed on a portion of the interconnect circuit within said fence; wherein said multiplicity of electrical conductors form a multiplicity of electrical paths between said I/O pads and said die contact pads; a top cap; a bottom cap; means for securing said substrate and the die between said top cap and said bottom cap; and means for applying a force normal to said substrate; whereby the normal force pushes said substrate interior toward said semiconductor circuit so as to planarize said die contact pads with respect to each other to improve their connection with the semiconductor circuit.
Claim 30
Dependent Claim 18 words
The carrier of claims 1, 2, 9, or 24 wherein said fence is formed from a polymer dielectric.
Claim 31
Dependent Claim 14 words
The carrier of claim 25 wherein said polymer dielectric forming said fence is photoimagable.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1998-03-27 1998-09-26 1999-03-28 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2002-03-27 2002-09-26 2003-03-28 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2006-03-27 2006-09-26 2007-03-28 $7700.00 Window Closed / Lapsed

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