Film-to-video format detection for digital television

Claim 2

A format detector for a receiver of a video signal, comprising: a pixel comparator for comparing data values of pixels of a current field of said video signal with data values of corresponding pixels of a second preceding field of said video signal, thereby obtaining a set of pixel difference values; an adder for adding together the absolute values of said set of pixel difference values, thereby obtaining a field difference value; a threshold comparator for comparing said field difference value to a predetermined threshold, thereby generating a binary field difference indicator; and a sequence analyzer for determining whether a series of field difference indicators follows a recognizable pattern.

Claim 3

The format detector of claim 1, wherein said pixel comparator is a logic circuit for calculating the difference between two pixel values.

Claim 4

The format detector of claim 1, wherein said pixel comparator is a processor programmed to calculate the difference between two pixel values.

Claim 5

The format detector of claim 1, wherein said adder is a logic circuit.

Claim 6

The format detector of claim 1, wherein said adder is a processor programmed to add the absolute values of said pixel difference values.

Claim 7

The format detector of claim 1, wherein said threshold comparator is a logic circuit.

Claim 8

The format detector of claim 1, wherein said threshold comparator is a processor programmed to compare said field difference value with said predetermined threshold.

Claim 9

The format detector of claim 1, wherein said sequence analyzer is a logic circuit.

Claim 12

The method of claim 9, wherein said pixel data values are luminance values.

Claim 13

The method of claim 9, wherein all of said steps are performed at a real-time image generation rate.

Claim 14

The method of claim 9, wherein said receiving and calculating steps are repeated for fewer than the number of pixels per field.

Claim 15

The method of claim 9, wherein said analyzing step further determines whether said series of field indicators has a pattern corresponding to a scene having no motion.

Claim 16

The method of claim 9, wherein said analyzing step is performed by determining a format state as each field indicator is received.

Claim 17

The method of claim 9, wherein said analyzing step is performed by storing a set of consecutive indicators and determining if said set of field indicators matches one or more stored patterns.

Claim 18

A digital processing system for a receiver of a video signal, comprising: a field buffer for storing pixel data from at least three fields of data of said video signal; a format detector for detecting the format of said video signal, wherein said format detector has a pixel comparator for comparing data values of pixels of a current field with data values of corresponding pixels of a second preceding field, thereby obtaining a set of pixel difference values; an adder for adding together the absolute values of said set of pixel difference values, thereby obtaining a field difference value; a threshold comparator for comparing said field difference value to a predetermined threshold, thereby generating a binary field difference indicator; a sequence analyzer for determining whether a series of field difference indicators follows a pattern corresponding to a film-to-video conversion; and a processing system for receiving said pixel data and for receiving a format control signal from said format detector, and for processing said pixel data in accordance with said format control signal.

Claim 19

A digital processing system for a receiver of a video signal, comprising: a field buffer for storing pixel data from at least three fields of data of said video signal; a format detector for detecting the format of said video signal, wherein said format detector has a pixel comparator for comparing data values of pixels of a current field with data values of corresponding pixels of a second preceding field, thereby obtaining a set of pixel difference values; an adder for adding together the absolute values of said set of pixel difference values, thereby obtaining a field difference value; a threshold comparator for comparing said field difference value to a predetermined threshold, thereby generating a binary field difference indicator; a sequence analyzer for determining whether a series of field difference indicators follows a pattern corresponding to a film-to-video conversion; and a processing system for receiving said pixel data and for receiving a format control signal from said format detector, and for processing said pixel data in accordance with said format control signal.

Claim 20

The system of claim 16, further comprising an analog to digital converter for converting said video signal to said pixel data.

Claim 21

The system of claim 16, further comprising a color separation unit for separating said pixel data into a luminance component and chrominance components.

Claim 22

The system of claim 16, wherein said sequence analyzer determines whether said series of field difference indicators has a pattern resulting from a scene with no motion.

Claim 23

The system of claim 16, further comprising a spatial light modulator for receiving bit-planes of data from said processing system for display.