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US5394372A Expired / Lapsed US ⏱️ 0.0 years remaining

Semiconductor memory device having charge-pump system with improved oscillation means

Assignee: Toshiba Corp
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Filing: 1993-03-26
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Granted: 1995-02-28
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Expires: 2013-03-26
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Abstract

Abstract A charge-pump system with an improved oscillation circuit. An electrically programmable non-volatile semiconductor memory device having the charge-pump system with the improved oscillation circuit includes a memory system equipped with a memory circuit having a non-volatile memory function, a oscillating circuit for generating an signal having a frequency which is increased in response to a decrease of a power supply voltage, and a charge-pump circuit which generates a voltage required to write data into or erase data from memory by charge-pumping the power supply voltage according to the signal generated by the oscillating circuit. A ring oscillator serves as the oscillating circuit and the ring oscillator is constituted of a group of inverter circuits connected circularly to one another via a MOS transistor which serves to transfer an electric charge, a gate electrode of the MOS transistor being connected to an output terminal of a voltage converting circuit which increases a transfer capacity of the MOS transistor as the power supply voltage decreases.

Inventors

  • 👤 Tomoharu Tanaka
  • 👤 Riichiro Shirota

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-30 16:12
CPC Classifications
G; G11; G11C; G11C16/00; G11C16/02; G11C16/06; G11C16/30; G11C5/00; G11C5/14; G11C5/145; H; H03; H03K; H03K3/00; H03K3/02; H03K3/027; H03K3/03; H03K3/0315; G11C16/10

Claims Analysis

Total Claims: 16
Claim 1
Independent Claim 89 words
An electrically programmable non-volatile semiconductor memory device operated by a power supply voltage, said memory device comprising: a memory system equipped with memory means having a non-volatile memory function; an oscillating circuit for generating a signal having a frequency which is continuously increased in response to a decrease of said power supply voltage; and a charge-pump circuit for generating a voltage required to write data into or erase data from said memory means by charge-pumping said power supply voltage in accordance with said signal generated by said oscillating circuit.
Claim 2
Dependent Claim 89 words
An electrically programmable non-volatile semiconductor memory device operated by a power supply voltage, said memory device comprising: a memory system equipped with memory means having a non-volatile memory function; an oscillating circuit for generating a signal having a frequency which is continuously increased in response to a decrease of said power supply voltage; and a charge-pump circuit for generating a voltage required to write data into or erase data from said memory means by charge-pumping said power supply voltage in accordance with said signal generated by said oscillating circuit.
Claim 3
Dependent Claim 76 words
A memory device according to claim 1, wherein said oscillating circuit comprises a ring oscillator which is comprised of a plurality of inverter circuits circularly connected to one another via a first MOS transistor which serves to transfer an electric charge, a gate electrode of said first MOS transistor being connected to an output terminal of a voltage converting circuit which increases a transfer capacity of said first MOS transistor as said power supply voltage decreases.
Claim 4
Dependent Claim 101 words
A memory device according to claim 1, wherein a ring oscillator is employed as said oscillating circuit, said ring oscillator comprising a plurality of inverter circuits which are circularly connected to one another, each of said plurality of inverter circuits being further connected to a power supply potential and to an electrical ground potential via a first MOS transistor which serves to transfer an electric charge, a gate electrode of said first MOS transistor being connected to an output terminal of a voltage converting circuit which increases a transfer capacity of said first MOS transistor as said power supply voltage decreases.
Claim 5
Dependent Claim 21 words
A memory device according to claim 1, wherein said memory system and said charge-pump circuit are employed on a memory card.
Claim 6
Dependent Claim 104 words
A memory device according to any of claims 2 or 3, wherein said first MOS transistor comprises an n-channel MOS transistor and said voltage converting circuit comprises a resistive element and a second n-channel MOS transistor which serves to shift a voltage level between an output level of a constant-voltage circuit and an electrical ground potential, said output terminal of said voltage converting circuit being a connecting point of said resistive element and said second n-channel MOS transistor, and said power supply voltage or a voltage proportional to said power supply voltage being applied to a gate electrode of said second n-channel MOS transistor.
Claim 7
Dependent Claim 89 words
A non-volatile semiconductor memory device comprising: a plurality of memory systems each equipped with memory means having a non-volatile memory function; a first high-voltage generating circuit, commonly connected to each of said plurality of memory systems, for generating a high voltage required to write data into or erase data from each of said memory means by transforming a power supply voltage; and a second high-voltage generating circuit for continuing an operation of said first high-voltage generating circuit in the event that said first high-voltage generating circuit fails to operate.
Claim 8
Dependent Claim 89 words
A non-volatile semiconductor memory device comprising: a plurality of memory systems each equipped with memory means having a non-volatile memory function; a first high-voltage generating circuit, commonly connected to each of said plurality of memory systems, for generating a high voltage required to write data into or erase data from each of said memory means by transforming a power supply voltage; and a second high-voltage generating circuit for continuing an operation of said first high-voltage generating circuit in the event that said first high-voltage generating circuit fails to operate.
Claim 9
Dependent Claim 34 words
A memory device according to claim 6, further comprising an oscillating circuit for generating a signal having a frequency which is continuously increased in response to a required decrease of said power supply voltage.
Claim 10
Dependent Claim 25 words
A memory device according to claim 6, wherein said plurality of memory systems and said first high-voltage generating circuit are employed on a memory card.
Claim 11
Dependent Claim 76 words
A memory device according to claim 7, wherein said oscillating circuit comprises a ring oscillator which is comprised of a plurality of inverter circuits circularly connected to one another via a first MOS transistor which serves to transfer an electric charge, a gate electrode of said first MOS transistor being connected to an output terminal of a voltage converting circuit which increases a transfer capacity of said first MOS transistor as said power supply voltage decreases.
Claim 12
Dependent Claim 101 words
A memory device according to claim 7, wherein a ring oscillator is employed as said oscillating circuit, said ring oscillator comprising a plurality of inverter circuits which are circularly connected to one another, each of said plurality of inverter circuits being further connected to a power supply potential and to an electrical ground potential via a first MOS transistor which serves to transfer an electric charge, a gate electrode of said first MOS transistor being connected to an output terminal of a voltage converting circuit which increases a transfer capacity of said first MOS transistor as said power supply voltage decreases.
Claim 13
Dependent Claim 104 words
A memory device according to any of claims 9 or 10, wherein said first MOS transistor comprises an n-channel MOS transistor and said voltage converting circuit comprises a resistive element and a second n-channel MOS transistor which serves to shift a voltage level between an output level of a constant-voltage circuit and an electrical ground potential, said output terminal of said voltage converting circuit being a connecting point of said resistive element and said second n-channel MOS transistor, and said power supply voltage or a voltage proportional to said power supply voltage being applied to a gate electrode of said second n-channel MOS transistor.
Claim 14
Dependent Claim 130 words
A semiconductor device comprising: an oscillating circuit for generating a signal having a frequency which is continuously increased in response to a decrease in a power supply voltage; and a charge-pump circuit for generating a voltage required to write data into or erase data from memory means by charge-pumping said power supply voltage in accordance with said signal generated by said oscillating circuit, wherein said semiconductor device is characterized in that a plurality of inverter circuits are circularly connected to one another via a first MOS transistor which serves to transfer to an electric charge, a gate electrode of said first MOS transistor being connected to an output terminal of a voltage converting circuit which increases a transfer capacity of said first MOS transistor as said power supply voltage decreases.
Claim 15
Dependent Claim 130 words
A semiconductor device comprising: an oscillating circuit for generating a signal having a frequency which is continuously increased in response to a decrease in a power supply voltage; and a charge-pump circuit for generating a voltage required to write data into or erase data from memory means by charge-pumping said power supply voltage in accordance with said signal generated by said oscillating circuit, wherein said semiconductor device is characterized in that a plurality of inverter circuits are circularly connected to one another via a first MOS transistor which serves to transfer to an electric charge, a gate electrode of said first MOS transistor being connected to an output terminal of a voltage converting circuit which increases a transfer capacity of said first MOS transistor as said power supply voltage decreases.
Claim 16
Dependent Claim 53 words
A memory device according to claim 6, wherein said first high voltage generating circuit comprises memory card means commonly connected to each of said plurality of memory systems, for generating a high voltage required to write data into or erase data from each of said memory means by transforming a power supply voltage.

References Cited (Backward Citations)

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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1998-02-27 1998-08-29 1999-02-28 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2002-02-27 2002-08-29 2003-02-28 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2006-02-27 2006-08-29 2007-02-28 $7700.00 Window Closed / Lapsed

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