Patent US5394144A successfully refreshed from Google Patents.
← Back to Patent Explorer
US5394144A Expired / Lapsed US ⏱️ 0.0 years remaining

Variable length code decoding apparatus

Assignee: WiniaDaewoo Co Ltd
•
Filing: 1993-06-08
•
Granted: 1995-02-28
•
Expires: 2013-06-08
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract A variable length code (VLC) decoding apparatus disclosed herein has an interface circuit 10 wherein an input bit stream is fed. The interface circuit 10 includes a plurality of window registers for directly extracting the decoding objective bit stream from the input bit stream. Each of the window registers has 2 n -bit storage locations for storing an bit stream shifted by 1 bit from that of its adjacent window registers. Therefore, the VLC decoding apparatus advantageously achieves a high speed for decoding operation through the use of a plurality of window registers for directly extracting a next undecoded sequence of an input bit stream.

Inventors

  • 👤 Gyu-Seok Kim

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-05 05:35
CPC Classifications
H; H03; H03M; H03M7/00; H03M7/30; H03M7/40; H03M7/42; H03M7/425

Claims Analysis

Total Claims: 3
Claim 1
Independent Claim 247 words
A variable length code decoding apparatus having an interface means for parallelly extracting an objective bit stream from input bit streams which includes variable length codewords and a table-lookup memory means, which is connected to the interface means, for decoding the objective bit stream and outputting a decoded symbol and word length information which indicates the length of decoded codeword corresponding to the decoded symbol, wherein said interface means comprises: a first latch means for receiving and holding a first 2 n -bit input bit stream; a second latch means for receiving and holding the first 2 n -bit input bit stream held in the first latch means when a second 2 n -bit input bit stream is fed to the first latch means; a plurality of window registers, hardwiredly coupled to the first and the second latch means and the table-lookup memory means, for receiving and holding the first and the second 2 n -bit input bit streams outputted from the first and the second latch means, each of the window registers having 2 n -bit storage locations for storing a 2 n -bit bit stream shifted by 1 bit from that stored in adjacent window register; and a control means responsive to word length information outputted from the table-lookup memory means for producing a window selection signal to directly select a window register holding a 2 n -bit stream correctly shifted according to the word length information so as to extract the objective bit stream.
Claim 2
Dependent Claim 247 words
A variable length code decoding apparatus having an interface means for parallelly extracting an objective bit stream from input bit streams which includes variable length codewords and a table-lookup memory means, which is connected to the interface means, for decoding the objective bit stream and outputting a decoded symbol and word length information which indicates the length of decoded codeword corresponding to the decoded symbol, wherein said interface means comprises: a first latch means for receiving and holding a first 2 n -bit input bit stream; a second latch means for receiving and holding the first 2 n -bit input bit stream held in the first latch means when a second 2 n -bit input bit stream is fed to the first latch means; a plurality of window registers, hardwiredly coupled to the first and the second latch means and the table-lookup memory means, for receiving and holding the first and the second 2 n -bit input bit streams outputted from the first and the second latch means, each of the window registers having 2 n -bit storage locations for storing a 2 n -bit bit stream shifted by 1 bit from that stored in adjacent window register; and a control means responsive to word length information outputted from the table-lookup memory means for producing a window selection signal to directly select a window register holding a 2 n -bit stream correctly shifted according to the word length information so as to extract the objective bit stream.
Claim 3
Dependent Claim 58 words
The variable length code decoding apparatus of claim 1, wherein said control means is coupled to the first latch means and produces a READ signal for latching the second 2 n -bit input bit stream into the first latch means when the first 2 n -bit input bit stream held in the second latch means has been decoded.

References Cited (Backward Citations)

US5173695A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1998-02-27 1998-08-29 1999-02-28 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2002-02-27 2002-08-29 2003-02-28 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2006-02-27 2006-08-29 2007-02-28 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag