Programmable delay generator for independently controlling leading and trailing edges of delayed pulse

Claim 2

A programmable delay generator comprising: a) a reference voltage producing means responsive to a digital control signal, and producing a reference voltage level corresponding to value indicated by said digital control signal; b) a voltage comparing means coupled with said reference voltage producing means and with an input pulse generator, and operative to compare the voltage level of an input pulse with said reference voltage level for producing a delayed pulse shrunk with respect to said input pulse; c) a delay means coupled with said input pulse generator, and operative to introduce time delay into said input pulse for producing delayed input pulse, said time delay introduced by said delay means being larger than time delay introduced by said voltage comparing means; and d) a composer coupled with said delay means and with said voltage comparing means, and operative to produce a composite delayed pulse from said delayed pulse and said delayed input pulse for independently controlling leading and trailing edges of said composite delayed pulse with respect to said input pulse.

Claim 3

A programmable delay generator as set forth in claim 1, in which said reference voltage producing means is implemented by a digital-to-analog converter.

Claim 4

A programmable delay generator as set forth in claim 1, in which said voltage comparing means is implemented by a voltage comparator directly supplied with said input pulse.

Claim 5

A programmable delay generator comprising: a) a reference voltage producing means responsive to a digital control signal, and producing a reference voltage level corresponding to value indicated by said digital control signal; b) a voltage comparing means coupled with said reference voltage producing means and with an input pulse generator, and operative to compare the voltage level of an input pulse with said reference voltage level for producing a delayed pulse shrunk with respect to said input pulse c) a delay means implemented by one of an integrator and a delay line, and coupled with said input pulse generator, said delay means being operative to introduce time delay into said input pulse for producing delayed input pulse, said time delay introduced by said delay means being larger than time delay introduced by said voltage comparing means; and d) a composer coupled with said delay means and with said voltage comparing means, and operative to produce a composite delayed pulse from said delayed pulse and said delayed input pulse for independently controlling leading and trailing edges of said composite delayed pulse with respect to said input pulse.

Claim 6

A programmable delay generator comprising: a) a reference voltage producing means responsive to a digital control signal, and producing a reference voltage level corresponding to value indicated by said digital control signal; b) a voltage comparing means coupled with said reference voltage producing means and with an input pulse generator, and operative to compare the voltage level of an input pulse with said reference voltage level for producing a delayed pulse shrunk with respect to said input pulse c) a delay means implemented by one of an integrator and a delay line, and coupled with said input pulse generator, said delay means being operative to introduce time delay into said input pulse for producing delayed input pulse, said time delay introduced by said delay means being larger than time delay introduced by said voltage comparing means; and d) a composer coupled with said delay means and with said voltage comparing means, and operative to produce a composite delayed pulse from said delayed pulse and said delayed input pulse for independently controlling leading and trailing edges of said composite delayed pulse with respect to said input pulse.

Claim 7

A programmable delay generator comprising: a) a reference voltage producing means responsive to a digital control signal, and producing a reference voltage level corresponding to value indicated by said digital control signal; b) a voltage comparing means coupled with said reference voltage producing means and with an input pulse generator, and operative to compare the voltage level of an input pulse with said reference voltage level for producing a delayed pulse shrunk with respect to said input pulse; c) a delay means coupled with said input pulse generator, and operative to introduce time delay into said input pulse for producing delayed input pulse, said time delay introduced by said delay means being larger than time delay introduced by said voltage comparing means; and d) a composer implemented by an OR gate, and coupled with said delay means and with said voltage comparing means, said composer being operative to produce a composite delayed pulse from said delayed pulse and said delayed input pulse for independently controlling leading and trailing edges of said composite delayed pulse with respect to said input pulse.

Claim 8

A programmable delay generator comprising: a) a reference voltage producing means responsive to a digital control signal, and producing a reference voltage level corresponding to value indicated by said digital control signal; b) a voltage comparing means coupled with said reference voltage producing means and with an input pulse generator, and operative to compare the voltage level of an input pulse with said reference voltage level for producing a delayed pulse shrunk with respect to said input pulse; c) a delay means coupled with said input pulse generator, and operative to introduce time delay into said input pulse for producing delayed input pulse, said time delay introduced by said delay means being larger than time delay introduced by said voltage comparing means; and d) a composer implemented by an OR gate, and coupled with said delay means and with said voltage comparing means, said composer being operative to produce a composite delayed pulse from said delayed pulse and said delayed input pulse for independently controlling leading and trailing edges of said composite delayed pulse with respect to said input pulse.

Claim 9

A programmable delay generator comprising: a) a reference voltage producing means responsive to a digital control signal, and producing a reference voltage level corresponding to value indicated by said digital control signal; b) a voltage comparing means coupled with said reference voltage producing means and with an input pulse generator, and operative to compare the voltage level of an input pulse with said reference voltage level for producing a delayed pulse shrunk with respect to said input pulse, said voltage comparing means comprising b-1) a buffer circuit supplied with said input pulse, and operative to keep the pulse rise time of said input pulse substantially constant, and b-2) a voltage comparator having two input node supplied with said reference voltage level and with said input pulse from said buffer circuit; c) a delay means coupled with said input pulse generator, and operative to introduce time delay into said input pulse for producing delayed input pulse, said time delay introduced by said delay means being larger than time delay introduced by said voltage comparing means; and d) a composer coupled with said delay means and with said voltage comparing means, and operative to produce a composite delayed pulse from said delayed pulse and said delayed input pulse for independently controlling leading and trailing edges of said composite delayed pulse with respect to said input pulse.

Claim 10

A programmable delay generator comprising: a) a reference voltage producing means responsive to a digital control signal, and producing a reference voltage level corresponding to value indicated by said digital control signal; b) a voltage comparing means coupled with said reference voltage producing means and with an input pulse generator, and operative to compare the voltage level of an input pulse with said reference voltage level for producing a delayed pulse shrunk with respect to said input pulse, said voltage comparing means comprising b-1) a buffer circuit supplied with said input pulse, and operative to keep the pulse rise time of said input pulse substantially constant, and b-2) a voltage comparator having two input node supplied with said reference voltage level and with said input pulse from said buffer circuit; c) a delay means coupled with said input pulse generator, and operative to introduce time delay into said input pulse for producing delayed input pulse, said time delay introduced by said delay means being larger than time delay introduced by said voltage comparing means; and d) a composer coupled with said delay means and with said voltage comparing means, and operative to produce a composite delayed pulse from said delayed pulse and said delayed input pulse for independently controlling leading and trailing edges of said composite delayed pulse with respect to said input pulse.

Claim 11

A programmable delay generator comprising: a) a reference voltage producing means responsive to a digital control signal for producing a reference signal; b) a first delay generating unit supplied with an input pulse, and responsive to said reference signal for introducing time delay between a leading edge of said input pulse and a leading edge of a composite delayed pulse; and c) a second delay generating unit supplied with an output pulse of said first delay generating unit, and responsive to said reference signal for introducing time delay between a trailing edge of said input pulse and a trailing edge of said composite delayed pulse so as to independently control timings for the leading edge and the trailing edge of said composite delayed pulse.

Claim 12

A programmable delay generator comprising: a) a reference voltage producing means responsive to a digital control signal for producing a reference signal; b) a first delay generating unit supplied with an input pulse, and responsive to said reference signal for introducing time delay between a leading edge of said input pulse and a leading edge of a composite delayed pulse; and c) a second delay generating unit supplied with an output pulse of said first delay generating unit, and responsive to said reference signal for introducing time delay between a trailing edge of said input pulse and a trailing edge of said composite delayed pulse so as to independently control timings for the leading edge and the trailing edge of said composite delayed pulse.

Claim 13

A programmable delay generator as set forth in claim 7, in which said reference voltage producing means is implemented by a digital-to-analog converter for producing a reference voltage level serving as said reference signal.

Claim 14

A programmable delay generator as set forth in claim 8, in which said first delay generating unit comprises b-1) a first voltage comparator operative to compare said input pulse with said reference voltage level for producing a primary delayed pulse, b-2) a first delay circuit operative to introduce first time delay into said input pulse for producing a primary delayed input pulse, and b-3) a first NOR gate supplied with said primary delayed pulse and with said primary delayed input pulse for producing a secondary input pulse serving as said output pulse of said first delay generating unit.

Claim 15

A programmable delay generator as set forth in claim 9, in which said second delay generating unit comprises c-1) a second voltage comparator operative to compare said secondary input pulse with said reference voltage level for producing a secondary delayed pulse, c-2) a second delay circuit operative to introduce second time delay into said secondary input pulse for producing a secondary delayed input pulse, and c-3) a second NOR gate supplied with said secondary delayed pulse and with said secondary delayed input pulse for producing said composite delayed pulse.

Claim 16

A programmable delay generator as set forth in claim 7, in which said reference voltage producing means comprises a first digital-to-analog converter for producing a first reference voltage level from a first bit string of said digital control signal, and a second digital-to-analog converter for producing a second reference voltage level from a second bit string of said digital control signal.

Claim 17

A programmable delay generator as set forth in claim 11, in which said first delay generating unit comprises b-1) a first voltage comparator operative to compare said input pulse with said first reference voltage level for producing a primary delayed pulse, b-2) a first delay circuit operative to introduce first time delay into said input pulse for producing a primary delayed input pulse, and b-3) a first NOR gate supplied with said primary delayed pulse and with said primary delayed input pulse for producing a secondary input pulse serving as said output pulse of said first delay generating unit.

Claim 18

A programmable delay generator as set forth in claim 12, in which said second delay generating unit comprises c-1) a second voltage comparator operative to compare said secondary input pulse with said second reference voltage level for producing a secondary delayed pulse, c-2) a second delay circuit operative to introduce second time delay into said secondary input pulse for producing a secondary delayed input pulse, and c-3) a second NOR gate supplied with said secondary delayed pulse and with said secondary delayed input pulse for producing said composite delayed pulse.