US5388248A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Flash memory card including plural flash memories and circuitry for selectively outputting ready/busy signals in different operating modes
Assignee: Intel Corp
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Filing: 1994-02-16
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Granted: 1995-02-07
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Expires: 2014-02-16
Abstract
Abstract A flash memory card is described which has a plurality of flash memories, each having a ready/busy output for indicating whether its respective one of the plurality of flash memories is busy or ready. A register circuit is provided for storing a plurality of mask data. A mode circuit is provided for choosing one of a first mode and a second mode, wherein a first mode signal is produced if the first mode is chosen and a second mode signal is produced if the second mode is chosen. A logic circuit is provided for performing logical operations with respect to the ready/busy output for each of the plurality of flash memories and the mask data in accordance with whether the first mode signal or the second mode signal is produced. If the first mode is chosen, the logic circuit produces a ready signal output for the flash memory card only if the ready/busy output of all the plurality of flash memories is ready. If the second mode is chosen, the logic circuit produces a ready signal output for the flash memory card each time any flash memory goes from being busy to being ready.
Inventors
- 👤 Kurt B. Robinson
- 👤 Russell D. Eslick
- 👤 Markus A. Levy
- 👤 David M. Brown
- 👤 Lily C. Pao
- 👤 Brian L. Dipert
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 20:16
CPC Classifications
G; G11; G11C; G11C16/00; G11C16/02; G11C16/06; G11C16/10; G11C16/102
Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
193 words
A flash memory card, comprising: (A) a plurality of flash memories with a respective plurality of first ready/busy outputs, wherein each ready/busy output of the plurality of ready/busy outputs indicates whether a respective flash memory of the plurality of flash memories is ready or busy; (B) register circuitry for storing mask data; (C) mode circuitry for choosing one of a first mode and a second mode, wherein a first mode signal is produced if the first mode is chosen, and wherein a second mode signal is produced if the second mode is chosen; (D) logic circuitry for performing logical operations with respect to the plurality of ready/busy outputs and the mask data in accordance with which one of the first mode signal and the second mode signal is produced (1) to produce a ready signal output for the flash memory card only if all the plurality of flash memories are ready if the first mode is chosen; (2) to produce a ready signal output for the flash memory card each time any flash memory of the plurality of flash memories goes from being busy to being ready if the second mode is chosen.
Claim 2
Dependent Claim
193 words
A flash memory card, comprising: (A) a plurality of flash memories with a respective plurality of first ready/busy outputs, wherein each ready/busy output of the plurality of ready/busy outputs indicates whether a respective flash memory of the plurality of flash memories is ready or busy; (B) register circuitry for storing mask data; (C) mode circuitry for choosing one of a first mode and a second mode, wherein a first mode signal is produced if the first mode is chosen, and wherein a second mode signal is produced if the second mode is chosen; (D) logic circuitry for performing logical operations with respect to the plurality of ready/busy outputs and the mask data in accordance with which one of the first mode signal and the second mode signal is produced (1) to produce a ready signal output for the flash memory card only if all the plurality of flash memories are ready if the first mode is chosen; (2) to produce a ready signal output for the flash memory card each time any flash memory of the plurality of flash memories goes from being busy to being ready if the second mode is chosen.
Claim 3
Dependent Claim
232 words
A flash memory card, comprising: (A) a plurality of flash memories with a respective plurality of first ready/busy outputs, wherein each ready/busy output of the plurality of ready/busy outputs indicates whether a respective flash memory of the plurality of flash memories is ready or busy; (B) register circuitry for storing mask data; (C) mode circuitry for choosing one of a first mode and a second mode, wherein a first mode signal is produced if the first mode is chosen, and wherein a second mode signal is produced if the second mode is chosen; (D) a plurality of jumpers for indicating how many flash memories are present on the flash memory card; (E) decoding circuitry for decoding the jumpers to produce a plurality of flash memory present signals; (F) logic circuitry for performing logical operations with respect to the plurality of ready/busy outputs, the mask data, and the flash memory present signals in accordance with which one of the first mode signal and the second mode signal is produced (1) to produce a ready signal output for the flash memory card only if all the plurality of flash memories are ready if the first mode is chosen; (2) to produce a ready signal output for the flash memory card each time any flash memory of the plurality of flash memories goes from being busy to being ready if the second mode is chosen.
Claim 4
Dependent Claim
232 words
A flash memory card, comprising: (A) a plurality of flash memories with a respective plurality of first ready/busy outputs, wherein each ready/busy output of the plurality of ready/busy outputs indicates whether a respective flash memory of the plurality of flash memories is ready or busy; (B) register circuitry for storing mask data; (C) mode circuitry for choosing one of a first mode and a second mode, wherein a first mode signal is produced if the first mode is chosen, and wherein a second mode signal is produced if the second mode is chosen; (D) a plurality of jumpers for indicating how many flash memories are present on the flash memory card; (E) decoding circuitry for decoding the jumpers to produce a plurality of flash memory present signals; (F) logic circuitry for performing logical operations with respect to the plurality of ready/busy outputs, the mask data, and the flash memory present signals in accordance with which one of the first mode signal and the second mode signal is produced (1) to produce a ready signal output for the flash memory card only if all the plurality of flash memories are ready if the first mode is chosen; (2) to produce a ready signal output for the flash memory card each time any flash memory of the plurality of flash memories goes from being busy to being ready if the second mode is chosen.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1998-02-06 | 1998-08-08 | 1999-02-07 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2002-02-06 | 2002-08-08 | 2003-02-07 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2006-02-06 | 2006-08-08 | 2007-02-07 | $7700.00 | Window Closed / Lapsed |