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US5386382A Expired / Lapsed US ⏱️ 0.0 years remaining

Semiconductor memory device and a manufacturing method thereof

Assignee: Samsung Electronics Co Ltd
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Filing: 1993-09-30
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Granted: 1995-01-31
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Expires: 2013-09-30
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Abstract

Abstract A semiconductor memory device includes a cell array region and a peripheral circuit region, wherein a channel is formed to surround the cell array region, on a border region between the cell array region and peripheral circuit region. Also, a method for the semiconductor memory device is provided. Therefore, the conventional problem of degraded reliability of the conductive layer due to the step between the cell array region and peripheral circuit region, can be prevented. At the same time, the surface planarization of the peripheral circuit region can be attained.

Inventors

  • 👤 Ji-hong Ahn

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-31 21:34
CPC Classifications
H; H10; H10B; H10B12/00; H10B12/01; H10B12/02; H10B12/03; H10B12/033; H10B12/30; H10B12/31; H10B12/318; H10W; H10W20/00; H10W20/01; H10W20/40

Claims Analysis

Total Claims: 7
Claim 1
Independent Claim 41 words
A semiconductor memory device comprising: a cell array region; a peripheral circuit region; and a border region between said cell array region and said peripheral circuit region, wherein a channel surrounding said cell array region is formed on said border region.
Claim 2
Dependent Claim 41 words
A semiconductor memory device comprising: a cell array region; a peripheral circuit region; and a border region between said cell array region and said peripheral circuit region, wherein a channel surrounding said cell array region is formed on said border region.
Claim 3
Dependent Claim 33 words
A semiconductor memory device as claimed in claim 1, wherein a memory cell formed in said cell array region is a dynamic random access memory cell consisting of one capacitor and one transistor.
Claim 4
Dependent Claim 19 words
A semiconductor memory device as claimed in claim 2, wherein said capacitor is formed of a cylindrical storage electrode.
Claim 5
Dependent Claim 30 words
A semiconductor memory device as claimed in claim 3, wherein the height of said channel is the same as that of said storage electrode formed on said cell array region.
Claim 6
Dependent Claim 25 words
A semiconductor memory device as claimed in claim 3, wherein the thickness of said channel is the same as that of said cylindrical storage electrode.
Claim 7
Dependent Claim 18 words
A semiconductor memory device as claimed in claim 1, wherein more than one of said channel is formed.

References Cited (Backward Citations)

JPS57210657A Cited
US4882289A Cited
US5171713A Cited
JPH04122066A Cited
US5279983A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1998-01-30 1998-08-01 1999-01-31 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2002-01-30 2002-08-01 2003-01-31 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2006-01-30 2006-08-01 2007-01-31 $7700.00 Window Closed / Lapsed

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