Patent US5384457A successfully refreshed from Google Patents.
US5384457A
Expired / Lapsed
US
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Low power optoelectronic device and method
Assignee: Logitech Europe SA
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Filing: 1992-08-10
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Granted: 1995-01-24
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Expires: 2012-08-10
Abstract
Abstract Methods and devices are disclosed for selectively varying the load to a photodetector such as a phototransistor which forms part of a photosource/photodetector pair and for selectively using to advantage or compensating for the parasitic capacitance of the photodetector to permit reductions in power, conversion of fixed signal thresholds to software controlled digital hysteresis, automatic adjustment and compensation for unmatched photosources and associated photodetectors, and adjustment of fixed voltage thresholds.
Inventors
- 👤 Rene Sommer
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-02 16:48
CPC Classifications
H; H03; H03K; H03K17/00; H03K17/51; H03K17/78; H03K17/795; H03K17/7955; H03K2217/00; H03K2217/0036
Claims Analysis
Total Claims: 17
Claim 1
Independent Claim
81 words
In a photosource/photodetector circuit having a photosource, a photodetector and a load in which the photosource is switched on and off, a method of selectively varying load comprising the steps of applying an active component in parallel with the load, the active component being switchable between low impedance and high impedance states, switching the active component to a low impedance state when the photosource is off, and switching the active component to a high impedance state when the photosource is on.
Claim 2
Dependent Claim
81 words
In a photosource/photodetector circuit having a photosource, a photodetector and a load in which the photosource is switched on and off, a method of selectively varying load comprising the steps of applying an active component in parallel with the load, the active component being switchable between low impedance and high impedance states, switching the active component to a low impedance state when the photosource is off, and switching the active component to a high impedance state when the photosource is on.
Claim 3
Dependent Claim
30 words
The invention of claim 1 in which the photosource is an LED and the photodetector is a phototransistor, and a plurality of such circuits are included within an electronic mouse.
Claim 4
Dependent Claim
96 words
In a photosource/photodetector circuit having a photosource, a photodetector and a load in which the photosource is switched on and off and the photodetector has an output and includes inherent parasitic capacitance, the method of minimizing power consuption comprising the steps of energizing the photosource for a preselected period such that light from the photosource impinges on the photodetector and charges the inherent parasitic capacitance of the photodetector, turning off the photosource, and after the photosource is turned off and before the inherent parasitic capacitance is discharged, reading the value of the output of the photodetector.
Claim 5
Dependent Claim
96 words
In a photosource/photodetector circuit having a photosource, a photodetector and a load in which the photosource is switched on and off and the photodetector has an output and includes inherent parasitic capacitance, the method of minimizing power consuption comprising the steps of energizing the photosource for a preselected period such that light from the photosource impinges on the photodetector and charges the inherent parasitic capacitance of the photodetector, turning off the photosource, and after the photosource is turned off and before the inherent parasitic capacitance is discharged, reading the value of the output of the photodetector.
Claim 6
Dependent Claim
23 words
The invention of claim 3 incorporated into an electronic mouse in which the photosource is an LED and the photodetector is a phototransistor.
Claim 7
Dependent Claim
158 words
In a photosource/photodetector circuit having a photosource, a photodetector and a load in which the photosource is switched on and off and the photodetector has an output and includes inherent parasitic capacitance, the method of creating digital hysteresis comprising the steps of setting a current sample value of the photodetector output, turning the photosource on so that light therefrom impinges on the photodetector and charges up the inherent parasitic capacitance, reading a first sample value of the photodetector output, waiting a preselected period of time representative of the difference between preselected first and second thresholds of a hysteresis loop, reading a second sample value of the photodetector output, testing the current sample value for a logical one, replacing the current sample value with the first sample value if the current sample is not a logical one, replacing the current sample value with the second sample value if the current sample is a logical one, repeating the foregoing steps.
Claim 8
Dependent Claim
158 words
In a photosource/photodetector circuit having a photosource, a photodetector and a load in which the photosource is switched on and off and the photodetector has an output and includes inherent parasitic capacitance, the method of creating digital hysteresis comprising the steps of setting a current sample value of the photodetector output, turning the photosource on so that light therefrom impinges on the photodetector and charges up the inherent parasitic capacitance, reading a first sample value of the photodetector output, waiting a preselected period of time representative of the difference between preselected first and second thresholds of a hysteresis loop, reading a second sample value of the photodetector output, testing the current sample value for a logical one, replacing the current sample value with the first sample value if the current sample is not a logical one, replacing the current sample value with the second sample value if the current sample is a logical one, repeating the foregoing steps.
Claim 9
Dependent Claim
135 words
In a photosource/photodetector circuit having a photosource, a photodetector and a load in which the photosource is switched on and off and the photodetector has an output and includes inherent parasitic capacitance, the method of selectively adjusting the output of the photodetector comprising the steps of setting a minimum time value equal to a predetermined worst case value, turning the photosource on for a period of time so that light therefrom impinges on the photodetector, initializing a timer, incrementing the timer, sampling the phototransistor output, testing the phototransistor output for a logical one, setting the minimum time value to the value of the timer if the phototransistor output is a logical one, incrementing the timer if the phototransistor output is not a logical one and the timer value is less than the minimum time value.
Claim 10
Dependent Claim
135 words
In a photosource/photodetector circuit having a photosource, a photodetector and a load in which the photosource is switched on and off and the photodetector has an output and includes inherent parasitic capacitance, the method of selectively adjusting the output of the photodetector comprising the steps of setting a minimum time value equal to a predetermined worst case value, turning the photosource on for a period of time so that light therefrom impinges on the photodetector, initializing a timer, incrementing the timer, sampling the phototransistor output, testing the phototransistor output for a logical one, setting the minimum time value to the value of the timer if the phototransistor output is a logical one, incrementing the timer if the phototransistor output is not a logical one and the timer value is less than the minimum time value.
Claim 11
Dependent Claim
26 words
The invention of claim 6 further including the steps of energizing the photosource for another minimum time value, and reading the phototransistor value as an output.
Claim 12
Dependent Claim
99 words
In a photosource/photodetector circuit having a photosource, a photodetector and a load in which the photosource is switched on and off and the photodetector has an output and includes inherent parasitic capacitance, the method of selecting an apparent input threshold comprising the steps of connecting a voltage controlled avalanching device in series with the photodetector, connecting an active component switchable between low and high impedance states in parallel with the voltage controlled avalanching device, switching the active component to a low impedance state when the photosource is on, and to a high impedance state when the photosource is off.
Claim 13
Dependent Claim
99 words
In a photosource/photodetector circuit having a photosource, a photodetector and a load in which the photosource is switched on and off and the photodetector has an output and includes inherent parasitic capacitance, the method of selecting an apparent input threshold comprising the steps of connecting a voltage controlled avalanching device in series with the photodetector, connecting an active component switchable between low and high impedance states in parallel with the voltage controlled avalanching device, switching the active component to a low impedance state when the photosource is on, and to a high impedance state when the photosource is off.
Claim 14
Dependent Claim
26 words
The invention of claim 8 wherein the voltage controlled avalanching device is a zener diode, the photosource is an LED and the photodetector is a phototransistor.
Claim 15
Dependent Claim
52 words
The invention of claim 8 further including the steps of connecting an element switchable between low and high impedance states in parallel with the resistive load, and switching the switchable element to a high impedance state when the photosource is on, and to a low impedance state when the photosource is off.
Claim 16
Dependent Claim
168 words
In an electronic mouse having a plurality of LED/phototransistor pairs, each pair having a shutter therebetween and the phototransistor having an output and inherent parasitic capacitance and a load connected between the output and a reference, the method comprising the steps of selectively turning the LEDs on and off connecting the outputs each to a respective switchable input/output port of a microprocessor, selecting the respective input/output ports to be an input at least during the substantial majority of the time when the associated LED is on, selecting the respective input/output ports to be an output and causing the output pin of the I/O port to be a low impedance at least during the substantial majority of the time when the associated LED is off, causing the parasitic capacitance of each phototransistor to charge during the time the associated LED is on, turning the associated LED off, sampling the value of the respective outputs after the associated LED is turned off and before the inherent parasitic capacitance is discharged.
Claim 17
Dependent Claim
168 words
In an electronic mouse having a plurality of LED/phototransistor pairs, each pair having a shutter therebetween and the phototransistor having an output and inherent parasitic capacitance and a load connected between the output and a reference, the method comprising the steps of selectively turning the LEDs on and off connecting the outputs each to a respective switchable input/output port of a microprocessor, selecting the respective input/output ports to be an input at least during the substantial majority of the time when the associated LED is on, selecting the respective input/output ports to be an output and causing the output pin of the I/O port to be a low impedance at least during the substantial majority of the time when the associated LED is off, causing the parasitic capacitance of each phototransistor to charge during the time the associated LED is on, turning the associated LED off, sampling the value of the respective outputs after the associated LED is turned off and before the inherent parasitic capacitance is discharged.
References Cited (Backward Citations)
US3104323A
Cited
US4277727A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
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| 3.5 Years (Year 4) | 1998-01-23 | 1998-07-25 | 1999-01-24 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2002-01-23 | 2002-07-25 | 2003-01-24 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2006-01-23 | 2006-07-25 | 2007-01-24 | $7700.00 | Window Closed / Lapsed |