Patent US5384275A successfully refreshed from Google Patents.
US5384275A
Expired / Lapsed
US
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Method of manufacturing a semiconductor integrated circuit device, and an electronic circuit device
Assignee: Mitsubishi Electric Corp
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Filing: 1993-07-30
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Granted: 1995-01-24
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Expires: 2013-07-30
Abstract
Abstract By the disclosed apparatus, the method and the electronic circuit device employing the disclosed apparatus, a configurable semiconductor integrated circuit device is manufactured in a reduced time. A regular logic input/output terminal (6) of a configurable semiconductor integrated circuit device (FPGA) (1) is connected to a data processing apparatus (52) through an interface circuit (51). On a magnetic disk (55), logic function specifying basic data are stored which define basic logic functions which are attainable with circuit diagram data and by the FPGA (1). The data processing apparatus (52) generates logic function specifying final data based on the circuit diagram data while utilizing basic logic operations of the FPGA (1) which is loaded with a logic. Since the basic logic operations of the logic-loaded FPGA (1) are used in generating the logic function specifying final data, the FPGA (1) is manufactured in a reduced time.
Inventors
- 👤 Kazuhiro Sakashita
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-08 17:56
CPC Classifications
H; H10; H10D; H10D84/00; H10D84/90; G; G06; G06F; G06F30/00; G06F30/30; G06F30/34
Claims Analysis
Total Claims: 19
Claim 1
Independent Claim
255 words
A method of manufacturing a configurable semiconductor integrated circuit device, said semiconductor integrated circuit device being loaded with a logic when provided under a logic function specifying mode with logic function specifying data through a logic function specifying data input terminal, said configurable semiconductor integrated circuit device performing, under a regular operation mode and through a regular logic input/output terminal, logic operations which are defined by said logic function specifying data, said configurable semiconductor integrated circuit device receiving said logic function specifying data through said logic function specifying data input terminal, said method comprising the steps of: (a) providing logic circuit data; (b) providing logic function specifying basic data which define basic logics; (c) setting said semiconductor integrated circuit device into said logic function specifying mode and providing said semiconductor integrated circuit device with said logic function specifying basic data so as to set said basic logics into said semiconductor integrated circuit device; (d) setting said semiconductor integrated circuit device into said regular operation mode so as to render said semiconductor integrated circuit device capable of performing basic logic operations which are defined by said logic function specifying basic data; (e) generating logic function specifying final data based on said logic circuit data, a part of said generating logic function specifying final data being attained by utilizing said basic logic operations of said semiconductor integrated circuit device; and (f) setting said semiconductor integrated circuit device into said logic function specifying mode and providing said semiconductor integrated circuit device with said logic function specifying final data.
Claim 2
Independent Claim
255 words
A method of manufacturing a configurable semiconductor integrated circuit device, said semiconductor integrated circuit device being loaded with a logic when provided under a logic function specifying mode with logic function specifying data through a logic function specifying data input terminal, said configurable semiconductor integrated circuit device performing, under a regular operation mode and through a regular logic input/output terminal, logic operations which are defined by said logic function specifying data, said configurable semiconductor integrated circuit device receiving said logic function specifying data through said logic function specifying data input terminal, said method comprising the steps of: (a) providing logic circuit data; (b) providing logic function specifying basic data which define basic logics; (c) setting said semiconductor integrated circuit device into said logic function specifying mode and providing said semiconductor integrated circuit device with said logic function specifying basic data so as to set said basic logics into said semiconductor integrated circuit device; (d) setting said semiconductor integrated circuit device into said regular operation mode so as to render said semiconductor integrated circuit device capable of performing basic logic operations which are defined by said logic function specifying basic data; (e) generating logic function specifying final data based on said logic circuit data, a part of said generating logic function specifying final data being attained by utilizing said basic logic operations of said semiconductor integrated circuit device; and (f) setting said semiconductor integrated circuit device into said logic function specifying mode and providing said semiconductor integrated circuit device with said logic function specifying final data.
Claim 3
Dependent Claim
38 words
The method of claim 1, wherein said circuit data described in said step (a) and said logic function specifying basic data described in said step (b) are data which are stored in first and second memory means, respectively.
Claim 4
Dependent Claim
72 words
The method of claim 2, wherein said steps (c) to (f) are attained by a data processing device which is connected accessible to said first and said second memory means, said step (e) includes the steps of: (e-1) generating said logic function specifying final data only by said data processing device; and (e-2) generating said logic function specifying final data by utilizing said basic logic operations of said semiconductor integrated circuit device.
Claim 5
Dependent Claim
95 words
The method of claim 3, wherein said semiconductor integrated circuit device includes an operation mode control terminal and a logic function specifying data input terminal, setting of said logic function specifying mode into said steps (c) and (f) is attained by giving said operation mode control terminal an operation mode control signal which calls for said logic function specifying mode, setting of said basic logic function specifying mode at said step (c) and entry of said logic function specifying final data at said step (g) are attained through said logic function specifying data input terminal.
Claim 6
Dependent Claim
71 words
The method of claim 4, wherein said semiconductor integrated circuit device further includes a regular logic input/output terminal, setting of said regular operation mode at said step (d) is attained by giving said operation mode control signal terminal an operation mode control signal which calls for a regular operation mode, and execution of said basic logic operations of said semiconductor integrated circuit device is attained through said regular logic input/output terminal.
Claim 7
Dependent Claim
101 words
The method of claim 5, wherein said step (e-2) includes the steps of: (e-2-1) inputting computation data by said data processing device to said semiconductor integrated circuit device through said logic function specifying data input terminal; (e-2-2) performing said basic logic operations on said computation data by said semiconductor integrated circuit device to obtain a computation result; (e-2-3) outputting said computation result which is yielded by said semiconductor integrated circuit device to said data processing device through said regular logic input/output terminal; and (e-2-4) generating said logic function specifying final data by said data processing device based on said computation result.
Claim 8
Dependent Claim
21 words
The method of claim 6, wherein said basic logic operations is to calculate (X·Y+Z) where X, Y and Z are inputs.
Claim 9
Dependent Claim
16 words
The method of claim 7, wherein said first and said second memory means are magnetic disks.
Claim 10
Dependent Claim
17 words
The method of claim 8, wherein said semiconductor integrated circuit device is FPGA (Field Programmable Gate Array).
Claim 11
Independent Claim
309 words
A method of manufacturing a semiconductor integrated circuit device, configurable semiconductor integrated circuit devices being loaded with a logic when provided under a logic function specifying mode with logic function specifying data through a logic function specifying data input terminal, said semiconductor integrated circuits device performing, under a regular operation mode and through a regular logic input/output terminal, logic operations which are defined by said logic function specifying data, said semiconductor integrated circuit devices receiving said logic function specifying data through said logic function specifying data input terminal, said method comprising the steps of: (a) providing circuit data which realize a desired logic; (b) providing at least one of logic function specifying basic data which define basic logics; (c) setting at least one of said semiconductor integrated circuit devices into said logic function specifying mode and providing said at least one of said semiconductor integrated circuit devices with said logic function specifying basic data so as to set a logic into said at least one of said semiconductor integrated circuit devices; (d) setting logic-loaded semiconductor integrated circuit devices into said regular operation mode so as to render said logic-loaded semiconductor integrated circuit devices capable of performing basic logic operations which are defined by said logic function specifying basic data; (e) dividing said circuit data and producing a plurality of divided circuit data; (f) generating a plurality of logic function specifying final data based on said plurality of divided circuit data, a part of said generating a plurality of logic function specifying final data being attained by utilizing said basic logic operations of said logic-loaded semiconductor integrated circuit device; (g) setting said plurality of said semiconductor integrated circuit devices into said logic function specifying mode and thereafter giving said plurality of said logic function specifying final data to the associated semiconductor integrated circuit devices through said regular logic input/output terminals.
Claim 12
Independent Claim
309 words
A method of manufacturing a semiconductor integrated circuit device, configurable semiconductor integrated circuit devices being loaded with a logic when provided under a logic function specifying mode with logic function specifying data through a logic function specifying data input terminal, said semiconductor integrated circuits device performing, under a regular operation mode and through a regular logic input/output terminal, logic operations which are defined by said logic function specifying data, said semiconductor integrated circuit devices receiving said logic function specifying data through said logic function specifying data input terminal, said method comprising the steps of: (a) providing circuit data which realize a desired logic; (b) providing at least one of logic function specifying basic data which define basic logics; (c) setting at least one of said semiconductor integrated circuit devices into said logic function specifying mode and providing said at least one of said semiconductor integrated circuit devices with said logic function specifying basic data so as to set a logic into said at least one of said semiconductor integrated circuit devices; (d) setting logic-loaded semiconductor integrated circuit devices into said regular operation mode so as to render said logic-loaded semiconductor integrated circuit devices capable of performing basic logic operations which are defined by said logic function specifying basic data; (e) dividing said circuit data and producing a plurality of divided circuit data; (f) generating a plurality of logic function specifying final data based on said plurality of divided circuit data, a part of said generating a plurality of logic function specifying final data being attained by utilizing said basic logic operations of said logic-loaded semiconductor integrated circuit device; (g) setting said plurality of said semiconductor integrated circuit devices into said logic function specifying mode and thereafter giving said plurality of said logic function specifying final data to the associated semiconductor integrated circuit devices through said regular logic input/output terminals.
Claim 13
Dependent Claim
39 words
The method of claim 10, wherein said circuit data described in said step (a) and said logic function specifying basic data described in said step (b) are data which are stored in said first and second memory means, respectively.
Claim 14
Dependent Claim
73 words
The method of claim 11, wherein said steps (c) to (g) are attained by a data processing device which is connected accessible to said first and said second memory means, said step (f) includes the steps of: (f-1) generating said logic function specifying final data only by said data processing device; and (f-2) generating said logic function specifying final data by utilizing said basic logic operations of said logic-loaded semiconductor integrated circuit device.
Claim 15
Dependent Claim
99 words
The method of claim 12, wherein said semiconductor integrated circuit devices each include an operation mode control terminal and a logic function specifying data input terminal, setting of said logic function specifying mode into said steps (c) and (g) is attained by giving said operation mode control signal terminal an operation mode control signal which calls for said logic function specifying mode, setting of said basic logic function specifying mode at said step (c) and entry of said plurality of logic function specifying final data at said step (g) are attained through said logic function specifying data input terminal.
Claim 16
Dependent Claim
72 words
The method of claim 13, wherein said semiconductor integrated circuit devices each further include a regular logic input/output terminal, setting of said regular operation mode at said step (d) is attained by giving said operation mode control signal terminal an operation mode control signal which calls for a regular operation mode, and execution of said basic logic operations of said semiconductor integrated circuit devices is attained through said regular logic input/output terminal.
Claim 17
Dependent Claim
104 words
The method of claim 14, wherein said step (f-2) includes the steps of: (f-2-1) inputting computation data by said data processing device to said logic-loaded semiconductor integrated circuit device through said logic function specifying data input terminal; (f-2-2) performing said basic logic operations on said computation data by said logic-loaded semiconductor integrated circuit device to obtain a computation result; (f-2-3) outputting said computation result which is yielded by said logic-loaded semiconductor integrated circuit device to said data processing device through said regular logic input/output terminal; and (f-2-4) generating said logic function specifying final data by said data processing device based on said computation result.
Claim 18
Dependent Claim
16 words
The method of claim 15, wherein said first and said second memory means are magnetic disks.
Claim 19
Dependent Claim
17 words
The method of claim 16, wherein said semiconductor integrated circuit device is FPGA (Field Programmable Gate Array).
References Cited (Backward Citations)
DE3606406A1
Cited
DE3630835A1
Cited
JPS62115844A
Cited
US4935734A
Cited
JPS631114A
Cited
DE3726570A1
Cited
DE4035405A1
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1998-01-23 | 1998-07-25 | 1999-01-24 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2002-01-23 | 2002-07-25 | 2003-01-24 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2006-01-23 | 2006-07-25 | 2007-01-24 | $7700.00 | Window Closed / Lapsed |