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US5383150A Expired / Lapsed US ⏱️ 0.0 years remaining

Semiconductor memory device

Assignee: PS4 Luxco SARL
•
Filing: 1994-01-19
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Granted: 1995-01-17
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Expires: 2014-01-19
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Abstract

Abstract A ferroelectric capacitor and another ferroelectric capacitor or dielectric capacitor have one of their electrodes commonly connected to an address selection switching element with its gate connected to a word line and the other of their electrodes connected to first and second plate voltage supply line, respectively. Two operation modes are provided. A first operation mode has a first voltage supplied to a first plate voltage supply line and a second voltage to a second plate voltage supply line. A second operation mode has the second voltage supplied to the first plate voltage supply line and the first voltage to the second plate voltage supply line.

Inventors

  • 👤 Masayuki Nakamura
  • 👤 Kazuyoshi Oshima

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-09 04:50
CPC Classifications
G; G11; G11C; G11C11/00; G11C11/21; G11C11/22; G11C11/221

Claims Analysis

Total Claims: 12
Claim 1
Independent Claim 154 words
A semiconductor memory device comprising: a switching element for address selection which has its gate connected to a word line; a ferroelectric capacitor which has one of electrodes thereof connected to a data line through the switching element and the other of the electrodes connected to a first plate voltage supply line; and a capacitor which has one of electrodes thereof commonly connected to the first electrode of the ferroelectric capacitor and the other of the electrodes connected to a second plate voltage supply line; wherein a first operation mode and a second operation mode are provided, the first operation mode has a first voltage supplied to the first plate voltage supply line and a second voltage supplied to the second plate voltage supply line, and the second operation mode has the second voltage supplied to the first plate voltage supply line and the first voltage supplied to the second plate voltage supply line.
Claim 2
Dependent Claim 154 words
A semiconductor memory device comprising: a switching element for address selection which has its gate connected to a word line; a ferroelectric capacitor which has one of electrodes thereof connected to a data line through the switching element and the other of the electrodes connected to a first plate voltage supply line; and a capacitor which has one of electrodes thereof commonly connected to the first electrode of the ferroelectric capacitor and the other of the electrodes connected to a second plate voltage supply line; wherein a first operation mode and a second operation mode are provided, the first operation mode has a first voltage supplied to the first plate voltage supply line and a second voltage supplied to the second plate voltage supply line, and the second operation mode has the second voltage supplied to the first plate voltage supply line and the first voltage supplied to the second plate voltage supply line.
Claim 3
Dependent Claim 28 words
A semiconductor memory device according to claim 1, wherein the first voltage is a ground potential of a circuit and the second voltage is a power supply voltage.
Claim 4
Dependent Claim 35 words
A semiconductor memory device according to claim 2, wherein the first operation mode is performed to make an ordinary access to memory and the second operation mode is performed before the power supply is interrupted.
Claim 5
Dependent Claim 23 words
A semiconductor memory device according to claim 1, wherein the capacitor connected to the second plate voltage supply line is a ferroelectric capacitor.
Claim 6
Dependent Claim 31 words
A semiconductor memory device according to claim 1, wherein the capacitor is a dielectric capacitor used in a dynamic memory cell and the ferroelectric capacitor is stacked on the dielectric capacitor.
Claim 7
Dependent Claim 28 words
A semiconductor memory device according to claim 1, wherein the ferroelectric capacitor and the capacitor are each formed in a fin construction and stacked one upon the other.
Claim 8
Dependent Claim 32 words
A semiconductor memory device according to claim 1, wherein one of the ferroelectric capacitor and the capacitor is formed in a fin construction and the other is formed in a trench construction.
Claim 9
Dependent Claim 224 words
An information processing system comprising: a semiconductor memory device; and a power supply voltage monitor circuit; wherein the semiconductor memory device comprising: a switching element for address selection which has its gate connected to a word line; a ferroelectric capacitor which has one of electrodes thereof connected to a data line through the switching element and the other of the electrodes connected to a first plate voltage supply line; and a capacitor which has one of electrodes thereof commonly connected to the first electrode of the ferroelectric capacitor and the other of the electrodes connected to a second plate voltage supply line; wherein a first operation mode and a second operation mode are provided, the first operation mode has a first voltage supplied to the first plate voltage supply line and a second voltage supplied to the second plate voltage supply line, the first voltage corresponding to a power supply voltage, the second voltage corresponding to a ground potential of a circuit, and the second operation mode has the second voltage supplied to the first plate voltage supply line and the first voltage supplied to the second plate voltage supply line; and wherein the power supply voltage monitor circuit detects an interruption of the power supply voltage to the semiconductor memory device and causes the semiconductor memory device to execute the second operation mode.
Claim 10
Dependent Claim 224 words
An information processing system comprising: a semiconductor memory device; and a power supply voltage monitor circuit; wherein the semiconductor memory device comprising: a switching element for address selection which has its gate connected to a word line; a ferroelectric capacitor which has one of electrodes thereof connected to a data line through the switching element and the other of the electrodes connected to a first plate voltage supply line; and a capacitor which has one of electrodes thereof commonly connected to the first electrode of the ferroelectric capacitor and the other of the electrodes connected to a second plate voltage supply line; wherein a first operation mode and a second operation mode are provided, the first operation mode has a first voltage supplied to the first plate voltage supply line and a second voltage supplied to the second plate voltage supply line, the first voltage corresponding to a power supply voltage, the second voltage corresponding to a ground potential of a circuit, and the second operation mode has the second voltage supplied to the first plate voltage supply line and the first voltage supplied to the second plate voltage supply line; and wherein the power supply voltage monitor circuit detects an interruption of the power supply voltage to the semiconductor memory device and causes the semiconductor memory device to execute the second operation mode.
Claim 11
Dependent Claim 35 words
An information processing system according to claim 8, wherein the power supply voltage monitor circuit detects an interruption of the power supply voltage and feeds a standby power supply voltage to the semiconductor memory device.
Claim 12
Dependent Claim 21 words
An information processing system according to claim 9, wherein the semiconductor memory device is constructed in the form of a card.

References Cited (Backward Citations)

US5357460A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1998-01-16 1998-07-18 1999-01-17 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2002-01-16 2002-07-18 2003-01-17 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2006-01-16 2006-07-18 2007-01-17 $7700.00 Window Closed / Lapsed

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